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Fingerprint authentication is one of the most reliable and widely used personal identification method. However, manual fingerprint authentication is tedious, inaccurate, time-consuming and costly that it is not capable of meeting today's increasing performance necessities. An automatic fingerprint authentication system (AFAS) is widely needed. It plays a very essential role in forensic and civilian applications such as criminal identification, access control, and ATM card verification. This paper describes the design and implementation of an Embedded Fingerprint Authentication system which operates in two stages: minutia extraction and minutia matching. The present technological era is demanding reliable and cost-effective personal authentication systems for a large number of daily use applications where security and privacy performance of the information is required. Biometrics authentication techniques in combination with embedded systems technologies give a demanding solution to this need. This paper explains the hardware-software co-design responsible for matching two fingerprint minutiae sets and suggests the use of reconfigurable architectures for Automatic Fingerprint Authentication System. Moreover, this paper explains the implementation of a fingerprint algorithm using a Spartan-6 FPGA, as an appropriate portable and low cost device. The experimental results show that system meets the response time requirements of Automatic Fingerprint Authentication System with high speed using hardware-software co-design.

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Carbon nanotube (CNT) is one of the embryonic technologies within recent inventions towards miniaturization of semiconductor devices and is gaining much attention due to very high throughput and very extensive series of applications in various analog/mixed signal applications of today’s high-speed era. The carbon nanotube field effect transistors (CNFETs) have been reconnoitred as the stimulating aspirant for the future generations of integrated circuit (IC) devices. CNFETs are being widely deliberated as probable replacement to silicon MOSFETs also. In this paper, different analog signal processing applications such as inverting amplifier, noninverting amplifier, summer, subtractor, differentiator, integrator, half-wave and full-wave rectifiers, clipper, clamper, inverting and noninverting comparators, peak detector, and zero crossing detector are implemented using low-power folded cascode operational amplifier (op-amp) implemented using CNFET. The proposed CNFET-based analog signal processing applications are instigated at 32 nm technology node. Simulation results show that the proposed applications are properly implemented using novel folded cascode operational amplifier (FCOA) implemented using CNFET.

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