The impact of a TaOx nanolayer at the GeSex/W interface on the performance of resistive switching memory in an Al/Cu/GeSex/TaOx/W structure has been examined. All materials and the memory structure have been investigated using high-resolution transmission electron microscopy, energy dispersive x ray spectroscopy, and x ray photo-electron spectroscopy analyses. A conically shaped crystalline Cu (111) nanofilament with a diameter of around 17 nm in the TaOx nanolayer after a current compliance (CC) of 500 μA has been observed, and this has been also characterized by fast Fourier transform. The low resistance state (LRS) decreases as the current compliances (CCs) increased from 1 nA to 1 mA, since the nanofilament diameter increased from 0.04 to 23.4 nm. This is also estimated by bipolar resistive switching characteristics. The resistivity of this crystalline Cu nanofilament is approximately 2300 μΩ.cm. The nanofilament has a cylindrical shape, with CCs ranging from 1 nA to 10 μA and a conical shape with CCs ranging from 50 μA-1 mA. The resistive switching mechanism has been explained successfully under SET and RESET operations. Improved resistive switching parameters, such as SET voltage, LRS, and high resistance state with consecutive switching cycles are obtained and compared to those of pure GeSex and TaOx materials. Extrapolated, long program/erase endurance of > 106 cycles, attributed to the Al/Cu/GeSex/TaOx/W structure design, is observed. This resistive switching memory structure shows extrapolated 10 years data retention with a resistance ratio of > 10 at a low CC of 0.1 μA at 50 °C. A large memory size of ∼ 6 Pbit/sq. in. is obtained, considering the nanofilament diameter at a low CC of 0.1 μA. This study is important not only for improving the performance of low-power resistive switching memory, but also helpful for designing other nonvolatile memory devices.

IntroductionOwing to NAND flash technology facing its scaling limit, resistive random access memory (RRAM) with simple film stack and no cross coupling issue between cells is a promising candidate for future high density memory application [1,2]. The 1TnR architecture with 3D vertical RRAM (VRRAM) structure realizes ultra-low bit cost for high compact density array [3,4]. However, this novel 1TnR structure and processes have not been proved yet. To meet requirements of VRRAM array operation, the nonlinear resistive memory with an excellent self-compliance and low current operation is indispensable [5,6]. A large voltage margin for the device operated with compliance current (ΔV COMP ) and high nonlinearity for the device at low resistance state (LRS) with reliable read voltage should be addressed.In this work, the key processes and the resistive switching for the VRRAM device in the 1TnR architecture are firstly demonstrated. Moreover, the TaO X /HfO X (TH) device with 1 μA operation current exhibits a large ΔV COMP (~ 1.6 V) for reliable pulse mode operation. Besides, a high LRS nonlinearity ~ 40, which can provide enough read/write margins in the VRRAM array for robust operation, is extracted from the reliable read voltage based on the constant voltage stress (CVS) test.VRRAM in 1TnR architecture Figure 1 shows the key process flow for the VRRAM device in the 1TnR architecture. Firstly, the via hole of oxide/metal multilayers were defined and etched to form the horizontal electrodes (HE) with a thickness of 40 nm, as shown in Fig. 1(a). Then, the Ta and HfO X films, respectively grown with PVD and ALD methods, and a thin TiN protection metal layer were conformally deposited, as depicted in Fig. 1(b). To open the connected hole above the bottom access transistor, the etch-back process was adopt to remove the Ta/HfO X film above the transistor via, as shown in Fig. 1(c). The HfO X VRRAM devices can keep damage-free by the protection of TiN layer during the etch-back process. Finally, as presented in Fig.1 (d), the vertical electrode (VE) was formed by the TiN metal filling the hole with the subsequent CVD process. Figure 2 demonstrates the cross-section TEM image of four VRRAM devices within the 1TnR architecture.In Fig. 3, it shows the distributions of forming voltage (V F ) for the HfO X VRRAM. Also, there is no obvious difference for the V F of the top and bottom vertical devices. The V F is larger than 5V due to small area HE (~0.018 μm 2 ), which fits well with the dependence of V F for the Ta/HfO X device on the cell size based on oxide breakdown theory [7], as shown in the inset of Fig. 3. These results prove the process stability for the initial behavior of VRRAM devices during forming in the 1TnR architecture. As shown in Fig. 4, the HfO X VRRAM device exhibits the robust resistive switching behavior with the on/off ratio larger than 10.