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A key challenge to tomorrow's real-time 3D rendering engine has beenthe memorybandwidthbarrierthat limits how fast an image canbe painted onto image memory. Anotherhas beenthe floating pointthroughputthat limits howmuch world coordinate data can be mapped to the screen. Other traditional challenges remain. The 3D engine must be small, modular, and affordable so it can be integratedintotomorrow's visionsystems easily. These barriers arebeingfranscendedand goals realizedbyimplementingnovel3D renderer prototypes on a new "software breadboard." The breadboard, implemented in C and VHDL, permits rapid evaluation of promising concepts using off-the-shelfmodels and high level structures. With a processor at each pixel in an array ofsmall image memory tiles, the 3D system model, is a streamlined version ofUNC's Pixel Planes designed to render more than 500,000 smooth shaded triangles per simulated second on a 1280 x 1024 pixel screen. It texture-maps vertices to generate digital maps and stores previouslycomputedtransformationsinasmallbufferto avoidredundantoperations. Theeffectis anefficient augmentation of scene detail. The breadboard, being developed under the auspices ofWright Laboratory, will help determine which functions should be implemented using ASICs. All system parameters, including the anti-aliasing method and the depth ofthe Z and color buffers, are programmable. Breadboardbenchmarks and associated analyses showthata single card, capable ofrendering useful real-time "outthe-windoW' scenes, is feasible today. The "software breadboard" is being used to design tomorrow's real-time 3D renderers. DISPLAY SYSTEM AND GRAPIIICS TECBNOLOGY TRENDSA review ofthe capabilities on pastprograms reveals that the mixing and merging ofailtypes ofdata has been a traditional task for cockpit display systems. Since electronic multifunction displays were introduced into the cockpit in the late sixties and early seventies, the electronic display system has become the primary information funnelto the pilot/operator for charts, maps, manuals, television. radar, infrared, instrumentation, and other supplies. Much ofthis information was drawn in the form of2D symbolic presentations.Through lines, arcs, alphanumerics, icons, and instrumentation readings are effective for communicating various classes of information, the aerospace communityhas indicatedaneedforcommunicatingthe surroundmore realisticallyto the pilot/operator." 2, 3 This is especially true when visual or sensor acquired scenes, normally in use, are prevented by mission requirements or hindered by events such as weather. Where terrain and other potential incursionary objects are positioned with respect to the viewer can be conveyed more effectively in many instances by using images rendered in sun-angle shaded perspective ratherthan inthe symbolic form. This eliminates a major part ofthe viewer workload associated with spatially manipulating, overlaying, integrating, and interpreting 2D images inside the viewer's mind. O-8194-1523-5/94/$6.OO SPIE Vol. 2219 Cockpit Display...

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Honeywell has been actively involved in the defmition of the next generation display processors for military and commercial cockpits. A major concern is how to achieve super graphics workstation performance in avionics applications. Most notable are requirements for low volume, low power, harsh environmental conditions, real-time performance and low cost. This paper describes the application of VHDL to the system analysis tasks associated with achieving these goals in a cost effective manner. The paper will describe the top level architecture identified to provide the graphical and video processing power needed to drive future high resolution display devices and to generate more natural panoramic 3D formats. The major discussion, however, will be on the use of VHDL to model the processing elements and customized pipelines needed to realize the architecture and for doing the complex system trade off studies necessary to achieve a cost effective implementation. New software tools have been developed to allow "virtual" prototyping in the VHDL environment. This results in a hardware/software codesign using VHDL performance and functional models. This unique architectural tool allows simulation and trade offs within a standard and tightly integrated toolset, which eventually will be used to specify and design the entire system from the top level requirements and system performance to the lowest level individual ASICs. New processing elements, algorithms, and standard graphical inputs can be designed, tested and evaluated without the costly hardware prototyping using the innovative "virtual" prototyping techniques which are evolving on this project. In addition, virtual prototyping of the display processor does not bind the preliminary design to point solutions as a physical prototype will. When the development schedule is known, one can extrapolate processing element performance and design the system around the most current technology.