Articles you may be interested inInvestigation of an anomalous hump in gate current after negative-bias temperature-instability in HfO2/metal gate p-channel metal-oxide-semiconductor field-effect transistors Appl. Phys. Lett. 102, 012103 (2013); 10.1063/1.4773479 Analysis of an anomalous hump in gate current after dynamic negative bias stress in HfxZr1-xO2/metal gate pchannel metal-oxide-semiconductor field-effect transistors Appl. Phys. Lett. 101, 052105 (2012); 10.1063/1.4739525 Effect of indium concentration on InGaAs channel metal-oxide-semiconductor field-effect transistors with atomic layer deposited gate dielectric J. Vac. Sci. Technol. B 29, 040601 (2011); 10.1116/1.3597199 Electrical characteristics and reliability properties of metal-oxide-semiconductor field-effect transistors with Zr O 2 gate dielectricThe positive bias temperature instability of n-channel metal-oxide-semiconductor field-effect transistors with ZrO 2 gate dielectric was studied. It was observed that the degradation in threshold voltage ͑⌬V T ͒ has an exponential dependence on the stress time in the temperature range from 25 to 75°C. The measurement of subthreshold slope ͑⌬S͒ during stress indicates that the degradation in V T is due to the interface trap charges Q it . The extracted activation energy of 0.3-0.5 eV is related to a degradation dominated by the release of atomic hydrogen in the Si-ZrO 2 interface.

Integration of organosilicate glass (OSG) and organofluorinated silicate glass (OFSG) low-k materials deposited using trimethylsilane precursor as interlayer dielectric (ILD) was investigated in this study. Although the full OSG structure showed the lowest capacitance, this structure suffered the integrated challenge, such as the poor deposition uniformity, chemical ashing damage, and cracking issues. Thus, a hybrid ILD scheme is introduced, which is stacked with OSG and OFSG dielectrics to address these issues. The process for this hybrid ILD scheme was optimized for deposition uniformity, permittivity, mechanical strength, low-k material damage, and electromigration resistance. An optimized ILD structure was integrated into 0.13μm Cu damascene process technology and showed much improvement compared to the full OSG or OFSG structure. The results of this study indicated that the hybrid structure which consists of the OSG and OFSG dielectrics can be successfully implemented in fully integrated interconnect structure.