Y. Oritsuki scite author profile

Abstract-The breakdown mechanism in LDMOS devices with high resistive drift region sustaining high-voltage applications is analyzed and explained. Holes generated by the impact-ionization in the drift region are found to hinder the formation of the breakdown condition by increasing the potential underneath the gate-overlap region. This mechanism is modeled and implemented into the compact model HiSIM_HV for circuit simulation. Good agreement of simulated characteristics with 2D-device simulation results has been achieved.

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Y. Oritsuki

Quasi-2-Dimensional Compact Resistor Model for the Drift Region in High-Voltage LDMOS Devices

HiSIM-HV: A Compact Model for Simulation of High-Voltage MOSFET Circuits

HiSIM-HV: A compact model for simulation of high-voltage-MOSFET circuits

Effect of Impact-Ionization-Generated Holes on the Breakdown Mechanism in LDMOS Devices

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