The effect of microstructures on the magnetic properties in the 6.5% Si-Fe alloy was studied. The alloy was subjected to two patterns of heat treatments, and the microstructures were observed by means of TEM. The alloy after an appropriate treatment has shown excellent soft magnetic properties, with the maximum permeability of 7.25x104and the core loss W , , , of 0.39 W/kg. The corresponding microstructure was characterized by the extremely fine domains of DO, order phase existing in B2 order phase. However, the coarsening of the DO, domains was found to reduce the maximum permeability and increase the core loss of the alloy. It is suggested that the coarsening of the DO, domains be accompanied with the formation of magnetic contrast around the boundary of the DO, and B2 phases. Therefore, it is assumed that the phase boundary tends to oppose the displacement of magnetic domain walls due to the existence of the magnetic contrast.

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A new magnetron sputtering apparatus assisted by microwave plasma has been developed to achieve high sputter deposition rates at low gas pressures. In this apparatus, a microwave plasma is produced in a cylindrical multipolar magnetron arrangement and utilized for DC magnetron sputtering deposition. With the assistance of microwave plasma, operation of the magnetron discharge has been achieved at pressures on the order of 10 −4 Torr. Aluminum films are deposited in this apparatus at rates greater than 50 nm/min even at the low gas pressure of 2.5 × 10 −4 Torr.

In the realization of large-scale single-flux-quantum (SFQ) digital systems, one of the most serious problems is the lack of high-density and high-speed memories. We have been developing random access memories using SFQ shift registers, which are one candidate to solve the memory problem in the SFQ digital system because of their high throughput and short access time.In this paper we have designed and tested a (4 × 8)-bit SFQ shift register file as a demonstration of the SFQ shift register memory system. Its target clock frequency is 20 GHz assuming an NEC 2.5 kA cm −2 Nb standard process. In the test, we have confirmed that 8-bit dual-rail data can be loaded to appropriate shift registers specified by 2-bit address data. We have also verified that the loaded data are read out and written back to the same shift register at high speed. A tested dc bias margin at 20 GHz is ±5%.

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