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The capacitor-less embedded dynamic random access memory (eDRAM) based on oxide semiconductor (OS) transistors exhibits a promising future and thus has lead to a growing demand for nanoscale OS thin-film transistors (TFTs). In this work, a self-aligned top-gate (SATG) amorphous InGaZnO (a-IGZO) TFT is demonstrated by using the simplest 3-masks (3M) process, and the downscaling-related issues are carefully addressed to strengthen its back-end-of-line (BEOL) compatibility and mass producibility. The gate insulator (GI) and associated interface defects of the TFTs are jointly optimized with 4-nm atomic-layer-deposited (ALD) AlO x on the pre-oxidized a-IGZO. The defects in a-IGZO channel are further manipulated with a rapid thermal anneal (RTA) in oxygen. By virtue of the strengthened gate controllability and modified channel properties, the fabricated TFT with 97-nm gate length (L g ) exhibits decent performance, such as a maximum on-state current (I ON ) of 32.4 μA μm −1 , as well as clear linear and saturation characteristics. Based on such 3M SATG a-IGZO TFTs with high device performance and inherently minimal parasitic capacitances, the developed capacitor-less eDRAM bit cell achieves a wide sensing margin and a long retention time of over 500 s. A highly manufacturable oxide TFT technology for high-performance and high-density monolithic-3D (M3D) integration is thus well established.

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