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As photolithography technology advances into submicron regime, the requirement for alignment accuracy also becomes much tighter. The alignment accuracy is a function of the strength of the alignment signal. Therefore, a detailed alignment signal intensity simulation for 0.8 um EPROM poly-l layer on ASM stepper was done based on the process of record in the fab to reduce misalignment and improve die yield.The alignment marker depth used for this simulation was from 1 127A to 1265A ( assuming silicon was consumed 46% during well mask oxidation ). First gate oxide thickness was 200 +/ 20A and poly-l thickness was targeted at 1500A with 1350A to 1700A variation.In the early process development cycle, a resist thickness of 1 .23 urn was used for poly-l layer with unacceptable alignment results. The simulation intensity curve showed a large dip at this thickness which might explain the alignment problem seen. From the simulation data, the optimal resist thickness was found to be 1.36 urn for this layer, since a good level of intensity could be obtained and the variation to marker depth was minimal. After changing resist thickness to 1.36 urn, the misalignment was significantly minimizeL Oxide thickness variation did not have significant impact on the alignment signal intensity. However, poly 1 thickness was the most important parameter to affect optical alignments. The real alignment intensity data versus resist thickness on production wafers was collected and it showed good agreement with the simulated results.Similar results were obtained for ONO dielectric layer at a different fab. As a different than optimal resist thickness was used, majority of the wafers were either rejected by steppers or grossly mis-aligned. After a correct resist thickness was used following alignment signal intensity simulation, all wafers went through with an excellent alignment accuracy.