State-of-the-art process-strained Si (PSS) technology featuring single-NiSi Schottky source/drain (S/D) and ultra-thin gate oxide of 1.2 nm is demonstrated for L gate down to 39 nm. +10% performance boost of Schottky-Barrier (SB)-PSS NMOS, as compared to its non-Schottky counterpart, is demonstrated due to series resistance reduction of the silicide S/D and enhanced strain effects. Highest SB-PSS PMOS drive current of 821 µA/µm (at V D = −1.2V and I off =100 nA/µm) is recorded when integrated with recessed Si 1-x Ge x S/D stressor.

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High-performance FinFET SONOS (silicon-oxide-nitrideoxide-silicon) flash cells with gate length down to 20nm have been fabricated and operated successfully on bulk-silicon substrate for the first time. A program/erase window of 2V has been achieved with high P/E speed (T P = 10µs and T E = 1ms), and a 1.5V window remained after 10 years at room temperature. Multi-level storage is also obtained with ∆V t > 4V and T P,E = 1ms. Operation voltages are not more than 7V in the two applications. Gate disturb issues are alleviated by applying an appropriate bias on unselected bit lines.