0.37mW/Gb/s low power SLVS transmitter for battery powered applications

Jeong, Youngkyun; Choi, Yoon-Chul; Choi, Eun-Ji; Ham, Sung Yeon; Kwon, Kee-Won; Jun, Young-Hyun; Chun, Jung-Hoon

doi:10.1109/iscas.2012.6271658

Cited by 5 publications

(2 citation statements)

References 3 publications

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“…This normally results in increased design and fabrication cost of the devices. While some other designs use reduced signal swing of the output voltage which do not apply to the presented target interface [2][3][4][5][6]. This design presents the data channel section of the HDMI transmitter circuit in 180 nm CMOS which is input with only one frequency of serial clock coming from the PLL and eliminated the use of multiple clock signals [7].…”

Section: Introductionmentioning

confidence: 99%

Design of a Low-Power 1.65 GBPS Data Channel for HDMI Transmitter

Agrawal¹,

Gamad²

2015

VLSICS

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This paper presents a design of low power data channel for application in High Definition MultimediaInterface (HDMI) Transmitter circuit. The input is 10 bit parallel data and output is serial data at 1.65 Gbps. This circuit uses only a single frequency of serial clock input. All other timing signals are derived within the circuit from the serial clock. This design has dedicated lines to disable and enable all its channels within two pixel-clock periods only. A pair of disable and enable functions performed immediately after power-on of the circuit serves as the reset function. The presented design is immune to data-dependent switching spikes in supply current and pushes them in the range of serial frequency and its multiples. Thus filtering requirements are relaxed. The output stage uses a bias voltage of 2.8 volts for a receiver pull-up voltage of 3.3 volts. The reported data channel is designed using UMC 180 nm CMOS Technology. The design is modifiable for other inter-board serial interfaces like USB and LAN with different number of bits at the parallel input.

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Section: Introductionmentioning

confidence: 99%

Design of a Low-Power 1.65 GBPS Data Channel for HDMI Transmitter

Agrawal¹,

Gamad²

2015

VLSICS

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“…However, the power consumption is still large for the battery operated devices. In [3], low power SLVS (Scalable Low-Voltage Signaling) transceivers are presented but are not applicable for cable communication because of higher signal swing requirement. There are other low power techniques [4] [5][6] mainly for on chip or intra board communications which are not directly applicable to inter-board cases.…”

Section: Introductionmentioning

confidence: 99%

Zero power 4.95Gbps HDMI transmitter

Gupta

Nandy

Sahni

et al. 2014

2014 IEEE International Symposium on Circuits and Systems (ISCAS)

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The HDMI open drain transmitter is designed to harvest power from the receiver, through the termination impedances during signaling. There is no local power supply needed at the transmitter side, neither any power is taken from the receiver apart from whatever power comes out of it during standard signaling. The zero power HDMI Transmitter capable of datarate 4.95Gbps, i.e. 1.65Gbps per Channel is designed in 65nm technology.

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