10.4: Improvement of Stability on a‐IGZO LCD

Wu, Chi Jung; Yoo, Seong-Yeon; Ning, Ce; Yang, Wei; Shang, Guang Liang; Wang, Ke; Liu, Chien-Hung; Liu, Xiang; Yuan, Guang C.; Chen, Jian; Xu, Yu-Bo; Lee, Woobong; Yu, Jian; Lee, Doo Hee

doi:10.1002/j.2168-0159.2013.tb06150.x

Cited by 6 publications

(3 citation statements)

References 0 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The advantage of oxide TFTs is that they require a low-temperature process, but a relatively high-temperature process at about 350 • C is being used for the mass production of displays. This is mainly due to the improvement of the mobility and bias stability of oxide TFTs [5,6]. It is noted that the quality of SiO 2 depends on its substrate process temperature; the density and leakage through SiO 2 and electrical breakdown voltage could be improved by increasing the deposition temperature of SiO 2 .…”

Section: Introductionmentioning

confidence: 99%

“…The buffer SiO 2 of coplanar structures and the gate dielectric SiO 2 of back-channel-etch (BCE) structures are usually deposited at 300 to 400 • C by plasma-enhanced chemical vapor deposition (PECVD) for display applications [7,8]. The coplanar structure of IGZO TFTs has the advantage of negligible overlap capacitance between the gate and source/drain electrodes, and thus, the RC (resistance-capacitance product) delay can be remarkably reduced for display applications [5][6][7] [9][10][11]. In addition, the coplanar oxide TFT is a strong candidate for low-temperature devices because it could not use high-temperature SiO 2 as a gate insulator (GI) because of the damage this would cause to IGZO during GI deposition [12].…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Significant Performance and Stability Improvements of Low-Temperature IGZO TFTs by the Formation of In-F Nanoparticles on an SiO2 Buffer Layer

Jeong

Nam²,

Park³

et al. 2020

Nanomaterials

View full text Add to dashboard Cite

We report the performance improvement of low-temperature coplanar indium–gallium–zinc–oxide (IGZO) thin-film transistors (TFTs) with a maximum process temperature of 230 °C. We treated F plasma on the surface of an SiO2 buffer layer before depositing the IGZO semiconductor by reactive sputtering. The field-effect mobility increases from 3.8 to 9.0 cm2 V−1·s−1, and the threshold voltage shift (ΔVth) under positive-bias temperature stress decreases from 3.2 to 0.2 V by F-plasma exposure. High-resolution transmission electron microscopy and atom probe tomography analysis reveal that indium fluoride (In-F) nanoparticles are formed at the IGZO/buffer layer interface. This increases the density of the IGZO and improves the TFT performance as well as its bias stability. The results can be applied to the manufacturing of low-temperature coplanar oxide TFTs for oxide electronics, including information displays.

show abstract

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Significant Performance and Stability Improvements of Low-Temperature IGZO TFTs by the Formation of In-F Nanoparticles on an SiO2 Buffer Layer

Jeong

Nam²,

Park³

et al. 2020

Nanomaterials

View full text Add to dashboard Cite

show abstract

“…High electrical performances and stability have been reported for back channel-etch (BCE) structure of oxide-TFT by using the AlOx film as a passivation layer (PV) [3]. However, the threshold voltage (V t ) of devices exhibited large shift behavior under positive/negative bias-temperature (P/NBTS) and positive/negative bias-light (P/NBIS) due to both electron and hole trapping in the active layer, the active layer/GI, and active layer/PV interface [4][5].…”

Section: Introductionmentioning

confidence: 99%

63.4: High‐Performance 4K x 2K 65‐in. TV with BCE‐Type Oxide TFTs

Yeh

Lin

2015

Symp Digest of Tech Papers

View full text Add to dashboard Cite

This paper investigated the 4k2k of 65-inch TV with oxide TFT performances. The abnormal subthreshold leakage current at high temperature results from active layer bulk, and GI/active layer interface. Finally, it is specific for the V t shift (-1V) of devices with color-materials as a passivation layer under NBIS. INTRODUCTIONIntense research efforts in the subject of oxide semiconductors have dramatically increased the performances of thin film transistors (TFT) as compared with amorphous silicon TFT since the end of past century [1]. Moreover, the oxide-TFT has been studied for applications in novel active-matrix displays (AMDs), such as smart phone, tablet, and large size TV [2]. High electrical performances and stability have been reported for back channel-etch (BCE) structure of oxide-TFT by using the AlOx film as a passivation layer (PV) [3]. However, the threshold voltage (V t ) of devices exhibited large shift behavior under positive/negative bias-temperature (P/NBTS) and positive/negative bias-light (P/NBIS) due to both electron and hole trapping in the active layer, the active layer/GI, and active layer/PV interface [4][5].In this paper, we study the influence of subthreshold leakage current on temperature dependence and GI bilayer of oxide-TFTs, and then the low temperature annealing in O 2 chamber were used to reduce amount of oxygen vacancy in the active layer. Finally, the oxide-TFTs coated with color Resistors (RGB-materials) as passivation layer show high performances of low V t shift under stress, good subthreshold slope, and weak hysteresis behavior. Finally, we demonstrate the high performances 4k2k TV by drive oxide-TFTs.

show abstract