11‐2: Technology Developments in High‐Resolution FMM‐free OLED and BEOL IGZO TFTs for Power‐Efficient Microdisplays

Abstract

Resolution, power efficiency, and brightness are crucial features in microdisplays for upcoming VR and AR applications. This presentation shows our work towards a high‐resolution direct RGB microdisplay. An IGZO TFTs with a top gate length of 80 nm is realized with 300mm facilities for high‐resolution backplane developments. For the development of high‐resolution OLED enabled by photolithographic patterning, we investigate an excess driving voltage in photolithographic patterned OLEDs caused by contaminants at the organic semiconductor interface. With necessary mitigation, we reduce the excess driving voltage and observe no significant lifetime change after multiple photolithographic patterning steps.

P‐210: Photolithography Patterning of Organic Light‐Emitting Diodes Using Solvent Resistant Electron Transport Materials

“…After the exposure, the coated positive PR except the pixel area is eliminated during the development process, and the reactive ion etching (RIE) step removes the deposited OLED layers except the pixel area. [6] Finally, the positive PR coated on the pixel area is removed through the PR strip process. This results in the retention of OLED layers only on the pixel portion of the devices.…”

59‐1: Invited Paper: Scaling Down of OLED Pixels Enabled by Photolithography

“…Here we show the device performance of non-patterned, 1x-patterned, 2x-patterned, and 3x patterned bottom emission Ir-based green OLEDs in Figure 9. We see the driving voltage of patterned devices is larger than the non-patterned device, which may be due to the interface contamination [10]. Brightness of non-patterned, 1x-patterned, 2x -patterned, and 3x-patterned OLED devices…”

27‐1: Fabrication Method for Miniaturized CAAC‐OS FET for High‐Definition AR/VR Displays

“…Oxide semiconductors (OS) are used for backplanes of many displays [1][2][3][4][5][6]. A c-axis aligned crystalline OS field effect transistor (CAAC-OS FET) has the following characteristics: a small number of masks are needed compared with a lowtemperature polysilicon FET, and a crystalline OS has no grain boundaries unlike polysilicon and thus has stable reliability; therefore, a device having a high withstand voltage can be fabricated using a crystalline CAAC-OS FET [7,8].…”