2016 IEEE International Solid-State Circuits Conference (ISSCC) 2016
DOI: 10.1109/isscc.2016.7417988
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12.4 A 10mW fully integrated 2-to-13V-input buck-boost SC converter with 81.5% peak efficiency

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Cited by 31 publications
(5 citation statements)
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“…However, affected by the simultaneously increased conduction and parasitic losses, the achieved power density is generally lower as the number of VCRs increases. The existing fine‐grained VCR SC converters, majorly based on either the binary or the customized topologies, suffer from suboptimal power stage losses as well as a limited power density at sub‐mW/mm 2 due also to the limited capacity density of on‐chip MIM and metal‐oxide‐metal (MOM) capacitors 76–79 . Even though using the MOS capacitor can improve the situation, the increased parasitic loss will significantly degrade the overall efficiency.…”
Section: Integrated Power Convertersmentioning
confidence: 99%
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“…However, affected by the simultaneously increased conduction and parasitic losses, the achieved power density is generally lower as the number of VCRs increases. The existing fine‐grained VCR SC converters, majorly based on either the binary or the customized topologies, suffer from suboptimal power stage losses as well as a limited power density at sub‐mW/mm 2 due also to the limited capacity density of on‐chip MIM and metal‐oxide‐metal (MOM) capacitors 76–79 . Even though using the MOS capacitor can improve the situation, the increased parasitic loss will significantly degrade the overall efficiency.…”
Section: Integrated Power Convertersmentioning
confidence: 99%
“…The existing fine-grained VCR SC converters, majorly based on either the binary or the customized topologies, suffer from suboptimal power stage losses as well as a limited power density at sub-mW/mm 2 due also to the limited capacity density of on-chip MIM and metal-oxide-metal (MOM) capacitors. [76][77][78][79] Even though using the MOS capacitor can improve the situation, the increased parasitic loss will significantly degrade the overall efficiency. In addition to the topology design, on-chip power components' utilization and switch driving are also essential design considerations.…”
Section: Sc Convertersmentioning
confidence: 99%
“…Solving (3)(4)(6), the relation of 1 and 2 can be obtained in (7). To achieve the same performance in effective time, the counter-based scheme should have smaller clock period.…”
Section: Counter-based Solution With Precise and Adjustable Non-overlmentioning
confidence: 99%
“…With the benefits of high integration, fast transient response, high current drivability and good flexibility, charge pumps are gaining interests from designers of display driver integrated circuits (ICs), flash memory and smart sensors [1][2][3]. To widen the range of input voltage and output voltage and then improve the total efficiency, more voltage conversion ratios (VCRs) are required while high integration needs be kept [4][5][6][7]. Thus, multi-phase charge pumps are superior since they have achieved efficient utilization of each off-chip capacitor [8][9][10][11].…”
Section: Introductionmentioning
confidence: 99%
“…The authors are with the Department of Electrical Engineering, KU Leuven, B-3001 Heverlee, Belgium, e-mail: nicolas.butzen@esat.kuleuven.be . high power density [10]- [12] or efficiency [13]- [15] to large voltage conversion ratio's (VCR's) [16], [17], and have been used for many different applications, including mobile [18], [19], MEMS [20] and the internet-of-things (IoT) [21]- [23]. In spite their popularity, however, there are still many research directions to be explored and issues to be solved, two of which are touched upon in this paper.…”
Section: Introductionmentioning
confidence: 99%