15.6 12b 250MS/S pipelined ADC with virtual ground reference buffers

Abstract

The virtual ground reference buffer (VGRB) technique is introduced as a means to improve the performance of switched-capacitor circuits. The technique enhances the performance by improving the feedback factor of the op-amp without affecting the signal gain. The bootstrapping action of the level-shifting buffers relaxes key op-amp performance requirements including unitygain bandwidth, noise, open-loop gain and offset compared with conventional circuits. This reduces the design complexity and the power consumption of op-amp based circuits. Based on this technique, a 12b pipelined ADC is implemented in 65nm CMOS that achieves 67.0dB SNDR at 250MS/s and consumes 49.7mW of power from a 1.2V power supply.

A Power-Efficient Pipelined ADC with an Inherent Linear 1-Bit Flip-Around DAC

“…Figure 6 shows the die micrograph of the ADC. The active area is 0.44 mm 2 . At a 1.1 V power supply, the full-scale input swing is up to 1.8 Vpp.…”

“…Analog-to-digital converters (ADCs) with above 12-bit resolution and sampling frequency above tens of MHz are widely used in modern communications, instrumentation, and high-quality consumer electronics. Pipeline converters are still attractive in these Nyquist sampling applications that require a combination of high resolution and high throughput [1][2][3][4][5][6][7][8]. For example, pipelined ADCs can be good candidates for OFDM-based 5G systems [9], enabling high speed communications such as virtual reality, remote sensing, needed by a fifth generation (5G) cellular network [10].…”