224-ke Saturation signal global shutter CMOS image sensor with in-pixel pinned storage and lateral overflow integration capacitor

Sakano, Yorito; Sakai, Shin-ichi; Tashiro, Yosuke; Kato, Y.; Akiyama, Kentaro; Honda, Katsuya; Sato, Mamoru; Sakakibara, Masaki; Taura, Toshiharu; Azami, Kenji; Hirano, Takuichi; Oike, Yusuke; Sogo, Y.; Ezaki, Takayuki; Narabu, Tadakuni; Hirayama, Teruo; Sugawa, Shigetoshi

doi:10.23919/vlsic.2017.8008498

Cited by 21 publications

(9 citation statements)

References 5 publications

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“…Performance comparison of several SEHDR image sensors [7][8][9][10][11] with the presented pixel is summarized in Table 2. We have achieved a 120 ke − FWC and a 160 μV/e − conversion gain, C.G.…”

Section: Discussionmentioning

confidence: 99%

“…To break through the restriction and to obtain higher SHEDR performance than that of the previous sensor, lateral overflow integration capacitor (LOFIC) technology [5][6][7][8][9] is introduced with backside illumination image sensor (BSI) technology. A basic pixel schematic and the operation timing of the LOFIC pixel are explained in Section 2 and the design of the BSI LOFIC pixel is described in Section 3.…”

Section: Introductionmentioning

confidence: 99%

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A 120-ke− Full-Well Capacity 160-µV/e− Conversion Gain 2.8-µm Backside-Illuminated Pixel with a Lateral Overflow Integration Capacitor

Takayanagi¹,

Miyauchi²,

Okura

et al. 2019

Sensors

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In this paper, a prototype complementary metal-oxide-semiconductor (CMOS) image sensor with a 2.8-μm backside-illuminated (BSI) pixel with a lateral overflow integration capacitor (LOFIC) architecture is presented. The pixel was capable of a high conversion gain readout with 160 μV/e− for low light signals while a large full-well capacity of 120 ke− was obtained for high light signals. The combination of LOFIC and the BSI technology allowed for high optical performance without degradation caused by extra devices for the LOFIC structure. The sensor realized a 70% peak quantum efficiency with a normal (no anti-reflection coating) cover glass and a 91% angular response at ±20° incident light. This 2.8-μm pixel is potentially capable of higher than 100 dB dynamic range imaging in a pure single exposure operation.

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Section: Discussionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A 120-ke− Full-Well Capacity 160-µV/e− Conversion Gain 2.8-µm Backside-Illuminated Pixel with a Lateral Overflow Integration Capacitor

Takayanagi¹,

Miyauchi²,

Okura

et al. 2019

Sensors

Self Cite

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“…Fig. 16 shows the FWC per unit area as a function of the DR, compared to other linear response CISs [1]- [4], [6]- [10], [16], [23]- [26]. A record area signal density of 95 ke − /μm 2 with a 130-dB DR was achieved.…”

Section: Measurement Results and Applicationmentioning

confidence: 97%

A High Near-Infrared Sensitivity Over 70-dB SNR CMOS Image Sensor With Lateral Overflow Integration Trench Capacitor

Murata

Kuroda

Fujihara

et al. 2020

IEEE Trans. Electron Devices

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This article presents a 16-µm pitch CMOS image sensor (CIS) exhibiting a high near-infrared (NIR) sensitivity and a 71.3-dB signal-to-noise ratio (SNR) with a linear response for high-precision absorption imaging. A 1.6-pF lateral overflow integration trench capacitor (LOFITreC) was introduced in each pixel to achieve a very high full well capacity (FWC), and a very low impurity concentration p-type Cz-Si substrate with a low oxygen concentration was employed for improving the NIR sensitivity. The developed CIS operated at a single exposure linear response wide dynamic range (DR) mode and a dual reset voltage mode for high SNR absorption imaging and achieved the maximum 24.3 Me − FWC, a wide spectral sensitivity from 200 to 1100 nm, and a photodiode quantum efficiency of 89.7%, 78.2%, and 26.7% at 860, 940, and 1050 nm, respectively. Both the spatial resolution and light sensitivity toward the NIR light were further improved by thinning the Si substrate and by applying a negative backside bias. Due to the LOFITreC, a record spatial efficiency of 95 ke − /µm 2 with a 130-dB DR was achieved. As one of the applications of the developed CIS, the NIR absorption imaging toward a noninvasive blood glucose measurement was experimented and a diffusion of 5 mg/dl glucose was clearly visualized at 1050 nm in real time. Index Terms-Absorption imaging, CMOS image sensor (CIS), lateral overflow integration trench capacitor (LOFITreC), near-infrared (NIR) light, signal-to-noise ratio (SNR).

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“…Generally, methods of extending dynamic range can be divided into three categories. One uses logarithmic pixels response to extend dynamic range as in [5], one group accepts multiple exposure-times to expand the dynamic range as in [6], and the other one applies lateral overflow capacitors to improve operation range [4,[7][8]. From aspect of device design, enhancing the capacitance of integrating capacitor is the most direct way.…”

Section: Introductionmentioning

confidence: 99%

Novel Multiple-Layer Stack Capacitor and Its Application in the IRPFA Readout Circuit

Liu

et al. 2021

IEEE Access

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224-ke Saturation signal global shutter CMOS image sensor with in-pixel pinned storage and lateral overflow integration capacitor

Cited by 21 publications

References 5 publications

A 120-ke− Full-Well Capacity 160-µV/e− Conversion Gain 2.8-µm Backside-Illuminated Pixel with a Lateral Overflow Integration Capacitor

A 120-ke− Full-Well Capacity 160-µV/e− Conversion Gain 2.8-µm Backside-Illuminated Pixel with a Lateral Overflow Integration Capacitor

A High Near-Infrared Sensitivity Over 70-dB SNR CMOS Image Sensor With Lateral Overflow Integration Trench Capacitor

Novel Multiple-Layer Stack Capacitor and Its Application in the IRPFA Readout Circuit

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