2000 IEEE MTT-S International Microwave Symposium Digest (Cat. No.00CH37017)
DOI: 10.1109/mwsym.2000.861095
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38 GHz MMIC PHEMT-based tripler with low phase-noise properties

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Cited by 8 publications
(3 citation statements)
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“…The key design parameters of the frequency multiplier are conversion gain, output power and harmonic suppression. Reflectors can be utilised at the input and output ports in a single‐ended topology to cancel the unwanted harmonic signals [1]. But the 3 dB fractional bandwidth (FBW) is only 1.4% due to the reflectors.…”
Section: Introductionmentioning
confidence: 99%
“…The key design parameters of the frequency multiplier are conversion gain, output power and harmonic suppression. Reflectors can be utilised at the input and output ports in a single‐ended topology to cancel the unwanted harmonic signals [1]. But the 3 dB fractional bandwidth (FBW) is only 1.4% due to the reflectors.…”
Section: Introductionmentioning
confidence: 99%
“…These harmonic signals are reflected back into the transistor, with adjustable phase, in order to increase the output power at the desired harmonic via reamplification and nonlinear mixing within the transistor. The reflector network technique, although not always explicitly described as such, has been utilized in various forms by several authors in the design of frequency triplers [13,15,18,19]. This previous research has included: simulation of a practical transistor and distributed matching network models; device fabrication and measurement; and in-depth performance analysis in terms of conversion gain, efficiency, noise, and stability.…”
Section: Introductionmentioning
confidence: 99%
“…Up to now, investigation in frequency triplers has mainly been undertaken with one non-linear device using either FET structures (like MESFET or HEMT), HBT structures or diodes [5][6][7][8]. In this proposal, two balanced frequency triplers are presented, in which two resp.…”
Section: Introductionmentioning
confidence: 99%