3kV SiC Charge-Balanced Diodes Breaking Unipolar Limit

Ghandi, Reza; Bolotnikov, Alexander; Lilienfeld, David; Kennerly, Stacey; Raju, Ravisekhar

doi:10.1109/ispsd.2019.8757568

Cited by 18 publications

(6 citation statements)

References 6 publications

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“…A feasible fabrication procedure of the new SiC IGBT is proposed with a set of established process steps in conventional planar gate SiC IGBT [12,[41][42][43]. The proposed fabrication flow is illustrated in Figure 10.…”

Section: Proposed Fabrication Proceduresmentioning

confidence: 99%

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A New SiC Planar-Gate IGBT for Injection Enhancement Effect and Low Oxide Field

Zhang¹,

Li²,

Zheng³

et al. 2020

Energies

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A new silicon carbide (SiC) planar-gate insulated-gate bipolar transistor (IGBT) is proposed and comprehensively investigated in this paper. Compared to the traditional SiC planar-gate IGBT, the new IGBT boasts a much stronger injection enhancement effect, which leads to a low on-state voltage (VON) approaching the SiC trench-gate IGBT. The strong injection enhancement effect is obtained by a heavily doped carrier storage layer (CSL), which creates a hole barrier under the p-body to hinder minority carriers from being extracted away through the p-body. A p-shield is located at the bottom of the CSL and coupled to the p-body of the IGBT by an embedded p-MOSFET (metal-oxide-semiconductor field effect transistors). In off-state, the heavily doped CSL is shielded by the p-MOSFET clamped p-shield. Thus, a high breakdown voltage is maintained. At the same time, owing to the planar-gate structure, the proposed IGBT does not suffer the high oxide field that threatens the long-term reliability of the trench-gate IGBT. The turn-off characteristics of the new IGBT are also studied, and the turn-off energy loss (EOFF) is similar to the conventional planar-gate IGBT. Therefore, the new IGBT achieves the benefits of both the conventional planar-gate IGBT and the trench-gate IGBT, i.e., a superior VON-EOFF trade-off and a low oxide field.

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Section: Proposed Fabrication Proceduresmentioning

confidence: 99%

“…All the implantation should be followed by high-temperature annealing in argon gas. Then, an n-type SiC layer is regrown [42,43], following which, the p-body regions and n+ regions are formed by ion implantations. Then, the trenches are created by dry etching, followed by gate oxide growth or deposition.…”

Section: Proposed Fabrication Proceduresmentioning

confidence: 99%

A New SiC Planar-Gate IGBT for Injection Enhancement Effect and Low Oxide Field

Zhang¹,

Li²,

Zheng³

et al. 2020

Energies

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“…The trench-refill approach is also challenging, since the refill process tends to produce crystallographic damage, and it is difficult to refill the trenches with the required dopant uniformity. Recently, SiC charge-balanced (CB) diodes and MOSFETs were reported as an alternative solution to SJ devices with a simpler fabrication process [8], [9]. However, the stacked nature of CB devices and the charge carrier redistribution required during switching, results in a device with switching delays that increase with each additional layer, becoming prohibitive when scaling SiC CB devices beyond 4.5kV.…”

Section: Introductionmentioning

confidence: 99%

Demonstration of 2kV SiC Deep-Implanted Super-Junction PiN Diodes

Ghandi¹,

Hitchcock²,

Kennerly³

2022

MSF

Self Cite

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We report successful demonstration of 2kV, SiC super-junction (SJ) PiN diodes formed by deep implantation of Al and N. In our devices, alternating 12μm deep n-type and p-type SJ pillars fabricated on a 10μm pitch and result in a SJ diode with a measured blocking voltage 500V higher than comparable non-SJ diodes. Four activation anneals ranging from 1700 °C to 2000 °C were compared for effectiveness in eliminating post-implant lattice damage, and the optimum anneal condition was identified.

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“…Alternately, the trench refill approach has generated crystallographic defects that result in excessive leakage at high blocking voltages, and achieving uniform, target dopant distribution inside re-grown layers has required complex growth conditions that make the regrowth process challenging. Recently, SiC charge-balanced (CB) diodes and MOSFETs were reported as an alternative solution to SJ devices with a simpler and scalable fabrication process [5][6]. In these devices, a novel drift layer architecture is implemented with buried p-doped regions inside the drift layers instead of p-doped pillars.…”

Section: Introductionmentioning

confidence: 99%

(Invited) Medium-Voltage SiC Devices for Next Generation of Power Conversion

Ghandi¹,

Hitchcock²,

Kennerly³

2021

ECS Trans.

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We report successful demonstration of 3.3kV SiC charge-balanced (CB) JBS diodes and 4.5kV CB MOSFETs with Ron,sp significantly below 1-D SiC unipolar limit. These devices implement a novel scalable drift layer architecture for a high voltage switch as an alternative solution to super-junction devices. Furthermore, 2kV, SiC super-junction (SJ) PiN diodes are reported. These diodes are formed by deep implantation of Al and N and show a blocking voltage 500V higher than comparable non-SJ diodes.

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3kV SiC Charge-Balanced Diodes Breaking Unipolar Limit

Cited by 18 publications

References 6 publications

A New SiC Planar-Gate IGBT for Injection Enhancement Effect and Low Oxide Field

A New SiC Planar-Gate IGBT for Injection Enhancement Effect and Low Oxide Field

Demonstration of 2kV SiC Deep-Implanted Super-Junction PiN Diodes

(Invited) Medium-Voltage SiC Devices for Next Generation of Power Conversion

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