5.5 A 2.1e⁻ Temporal Noise and −105dB Parasitic Light Sensitivity Backside-Illuminated 2.3µm-Pixel Voltage-Domain Global Shutter CMOS Image Sensor Using High-Capacity DRAM Capacitor Technology

An Over 120 dB Single Exposure Wide Dynamic Range CMOS Image Sensor With Two-Stage Lateral Overflow Integration Capacitor

“…Here, the calculation was carried out with the conditions that the capacitance area ratio is 80% of all the pixel area, the number of input-referred noise is 1 e − rms , and the signal voltage range at FD is 0.8 V. Typical MOS capacitors have a capacitance density of about 5 fF/µm 2 . High-k dielectric MIM capacitors with a capacitance density of about 50 fF/µm 2 [13], [34], and dynamic random access memory (DRAM) capacitors with a capacitance density of about 350 fF/µm 2 [35] have been reported to be useful for CIS pixels. A versatile high capacitance density and highly reliable Si deep trench capacitors with over 230 fF/µm 2 and 9.0 V break down voltage are recently developed [36].…”

A 134×132 4-Tap CMOS Indirect Time-of-Flight Range Imager Using In-Pixel Memory Array With 10 Kfps High-Speed Mode and High Precision Mode

“…Third, to achieve better DC, creating doping gradient on P-epi [24] is beneficial to increasing charge collection efficiency in the vertical direction, resulting in better depth precision. Lastly, the RN can be reduced by implementing a column-ADC circuit and using higher density in-pixel memory with textured deep trench SiN capacitors [29] or high-capacity DRAM capacitors [30], [31]. Moreover, by utilizing high-density capacitor and 3-D stacking techniques, it is possible to implement more in-pixel memory, which can extend the duration of burst imaging even at a higher frame rate.…”

[Invited Paper] A High SNR Global Shutter CMOS Image Sensor Technology for High Precision Absorption Imaging Applications

“…How much spatial resolution or imaging range is required depends on the application, pixel shrinking is possible while maintaining saturation performance and GS operation by combining higher density capacitor and 3D stacking technology. Recently, many high-density capacitor technologies have been reported 14,[22][23][24] , some of which have leakage current characteristics low enough to be used for LOFIC or signal storage in image sensors. For instance, deep trench capacitor having textured surface with the depth of 14.3 µm achieved a capacitance density of 235 fF/µm 2 and leakage current of below 10 -9 A/cm 2 .…”