A 90nm CMOS «LDO» regulator with high load regulation using a gain boost-up technique

Akhamal, Hicham; Chakir, Mostafa; Qjidaa, Hassan

doi:10.1109/icmcs.2016.7905612

Cited by 4 publications

(1 citation statement)

References 13 publications

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“…Low-dropout linear regulator (LDO) is a voltage converter with simple structure, low cost and small output voltage ripple, which is widely used in portable wearable devices, high-end medical testing instruments, industrial robot arms and lowpower LED lighting fixtures [1]- [3] . The traditional pure CMOS process LDO can support the input voltage range is generally below 5V, which cannot meet the complex input voltage scenarios of modern electronic devices, and mobile electronic devices put forward more stringent requirements for battery life, and the smaller the LDO quiescent current index, the better.…”

Section: Introductionmentioning

confidence: 99%

Design of a Wide Input Voltage Low Quiescent Current LDO

Li¹,

Wang²,

Gou³

2023

IJCATR

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A low-dropout linear regulator (LDO) with wide input voltage range, wide output voltage range and low quiescent current power consumption is proposed, which is applied to the switching power supply chip to power the internal module of the switching power supply chip. The low-dropout linear regulator is based on a P-type PowerFET design consisting of an error amplifier, a Bandgap reference. The circuit was designed and implemented by SMIC 0.18um BCD process, simulated and verified using Spectre software. The simulation results show that the linear regulation is 0.04mV/V in the input voltage range of 3.5-30V, and the load regulation is 1mV/mA in the output load current range of 10uA to 10mA, and the quiescent current is only 10uA.

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Section: Introductionmentioning

confidence: 99%

Design of a Wide Input Voltage Low Quiescent Current LDO

Li¹,

Wang²,

Gou³

2023

IJCATR

View full text Add to dashboard Cite

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An 800 mA load current LDO with wide input voltage range

Yin

Huang

Duan

et al. 2017

2017 International Conference on Circuits, Devices and Systems (ICCDS)

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A 916 nW Power LDO Regulator Circuit in 90-nm CMOS Technology for RF SoC Applications

Akhamal

Chakir

Ameziane

et al. 2021

Wseas Transactions on Circuits and Systems

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This paper presents a nano-power Low Drop-Out (LDO) voltage regulator circuit for RadioFrequency System-on-Chip (RF SoC) applications, this LDO is designed for a smaller dimension due to CMOS technology and in the weak inversion region, can thus be used to minimize power loss of LDO regulator without transient-response degradation. The proposed structure its low power dissipation make it ideal for RF system-on-chip applications that require low power dissipation under different loading conditions. In order to optimize performance for LDO, the proposed amplifier helps to minimize power of LDO regulators without using any on-chip and off-chip compensation capacitors. The power is 916 nW. The output spot noise at 100Hz and 1 kHz are 200nV/sqrt (Hz) and 6nV/sqrt (Hz), respectively. The active area of the circuit is 850 μm2. The regulator operates with supply voltages from 1.2V to 2V

show abstract

A 90nm CMOS «LDO» regulator with high load regulation using a gain boost-up technique

Cited by 4 publications

References 13 publications

Design of a Wide Input Voltage Low Quiescent Current LDO

Design of a Wide Input Voltage Low Quiescent Current LDO

An 800 mA load current LDO with wide input voltage range

A 916 nW Power LDO Regulator Circuit in 90-nm CMOS Technology for RF SoC Applications

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