A Broadband Receive Chain in 65nm CMOS

Lee, S.; Bergervoet, J.; Harish, K.S.; Leenaerts, D.M.W.; Roovers, R.; Beek, C.Z. van de; Weide, G. van der

doi:10.1109/isscc.2007.373472

Cited by 38 publications

(17 citation statements)

References 4 publications

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“…Source-followers buffering the IFoutputs plus bias circuitry consume 13mW. The power consumption of the core circuit is 16mW from a 1.2V supply.The achieved performance compares favorably to the state-of-theart [1][2][3], especially with respect to RF bandwidth and linearity (see Fig. 17.3.6).…”

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confidence: 80%

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A Wideband Balun LNA I/Q-Mixer combination in 65nm CMOS

Blaakmeer

Klumperink

Leenaerts

et al. 2008

2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers

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Wideband receivers are required for many applications including the upcoming software-defined radio (SDR) architectures and ultra-wideband communication standards [1][2][3]. These standards cover a frequency spectrum from a few hundred MHz up to 6GHz. Co-operability with other communication devices (e.g., cellular and WLAN) operating in the same spectrum is mandatory, setting especially stringent demands on the wideband linearity of such receivers. The use of area-consuming on-chip inductors must be avoided as the cost per area of modern CMOS processes is high. The receiver preferably has a single-ended RF-input, as this avoids the use of an external broadband balun and its accompanying losses. A 65nm CMOS inductor-less wideband LNAmixer topology is presented, merging a current commutating I/Qmixer with a noise canceling balun-LNA. Figure 17.3.1 shows the topology of the proposed receiver frontend, which combines the functionality of a balun, an LNA and an I/Q-Mixer (Blixer) into one circuit cell. The transistor in commongate (CG) configuration gives wideband input matching (Z in ≈1/g m ). The inverter-based common-source (CS) stage produces a current in anti-phase with the CG output current, providing the single-to-differential conversion. The normally dominant thermal noise of the CG stage is canceled robustly [4]. The noise current of the CG transistor generates a noisy input voltage on the source resistance (R S ). This voltage results in an output current in the CS stage which is in-phase and fully correlated with the noise current of the CG transistor. The CG noise can thus be canceled at the differential output. The effective g m of the CS stage is 4 times higher than the CG g m in order to limit its noise contribution. The output currents of the CG and CS stage (g m ·v rf and 4·g m ·v rf in Fig. 17.3.1) are distributed to two identical current-commutating mixer cells, as shown in Fig. 17.3.2. The drains of the transistors commutating the CS current are loaded by only ¼ of the total RC load. The difference in loading compensates the (4×) difference in g m of the CG and CS stage, leading to equal conversion gain of the CG and CS side of the circuit. This gain balancing renders simultaneous canceling of the noise and distortion of the CG transistor, as in the LNA in [5]. However, in contrast to that design, here the canceling takes place at the IF output, after frequency translation. As the distortion of the CG transistor is canceled, the inverter-based CS stage is biased for minimal 2 ndorder distortion to obtain a high IIP2 of the complete circuit. In contrast to narrowband systems 2 nd -order distortion products can fall in-band, thus obtaining a high IIP2 is important for wideband receivers. The Blixer topology has only two internal RF nodes, the drains of the CG and CS transistors. The impedance at these points is set by the input impedance of the mixer devices. This impedance (~1/g m of the mixer transistors) is low, approximately 100Ω and 25Ω for the CG and CS side, respectively. The absence of high ...

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confidence: 99%

A Wideband Balun LNA I/Q-Mixer combination in 65nm CMOS

Blaakmeer

Klumperink

Leenaerts

et al. 2008

2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers

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“…However, in contrast to our design, this design has no quadrature outputs. Compared to the designs with quadrature outputs [1]- [3], the power consumption of our design is about 2 times lower.…”

Section: Ic Implementation and Measurementsmentioning

confidence: 95%

“…This does not affect the DC-voltages and voltage gain. With mS and , the voltage gain of the CG stage is (1) As the gain of the CS stage is equal but with opposite sign, the total voltage gain of the CG-CS LNA from single-ended input to differential output is 2 times higher:…”

Section: B Achievable Gain and Bandwidthmentioning

confidence: 99%

The Blixer, a Wideband Balun-LNA-I/Q-Mixer Topology

Blaakmeer

Klumperink

Leenaerts

et al. 2008

IEEE J. Solid-State Circuits

126

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“…In order to test our model on a more realistic example, we took the 65nm RF-CMOS LNA published in [5,6] and used the subsequent (transistor-level) mixer as its load. The LNA and the simulation setup are shown in Figure 6.…”

Section: Comparison Between Model and Ciruit Simulationsmentioning

confidence: 99%

Accurate Modeling of RF Circuit Blocks: Weakly-Nonlinear Narrowband LNAs

Croon

Leenaerts

Klaassen

2007

2007 IEEE Custom Integrated Circuits Conference

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An extensive behavioral model is presented for weaklynonlinear narrowband LNAs. Both the electrical transfer and noise properties are well described. Performance figures can be predicted for varying source and load conditions. A Verilog-A implementation facilitates cross-platform simulations. The model is compared to transistor-level simulations of a simple textbook LNA and of a state-of-the-art 65nm CMOS LNA in combination with a mixer. Excellent agreements are achieved.

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A Broadband Receive Chain in 65nm CMOS

Cited by 38 publications

References 4 publications

A Wideband Balun LNA I/Q-Mixer combination in 65nm CMOS

A Wideband Balun LNA I/Q-Mixer combination in 65nm CMOS

The Blixer, a Wideband Balun-LNA-I/Q-Mixer Topology

Accurate Modeling of RF Circuit Blocks: Weakly-Nonlinear Narrowband LNAs

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