2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers. 2006
DOI: 10.1109/vlsit.2006.1705198
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A Comparative Study of NBTI and PBTI (Charge Trapping) in SiO2/HfO2 Stacks with FUSI, TiN, Re Gates

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Cited by 170 publications
(98 citation statements)
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“…NBTI manifests itself as a temporal increase in the threshold voltage, Î Ø , of a PMOS transistor, thereby causing circuit delays to degrade over time and exceed their specifications. A corresponding and dual effect, known as Positive Bias Temperature Instability (PBTI) [1]- [3], is seen for NMOS devices, when a positive bias stress is applied across the gate oxide of the NMOS device. Although the impact of PBTI is lower than NBTI [2], it is increasingly becoming important in its own right, particularly with the use of Hf-based high-k gate oxides for leakage reduction [1], [3].…”
Section: Introductionmentioning
confidence: 99%
“…NBTI manifests itself as a temporal increase in the threshold voltage, Î Ø , of a PMOS transistor, thereby causing circuit delays to degrade over time and exceed their specifications. A corresponding and dual effect, known as Positive Bias Temperature Instability (PBTI) [1]- [3], is seen for NMOS devices, when a positive bias stress is applied across the gate oxide of the NMOS device. Although the impact of PBTI is lower than NBTI [2], it is increasingly becoming important in its own right, particularly with the use of Hf-based high-k gate oxides for leakage reduction [1], [3].…”
Section: Introductionmentioning
confidence: 99%
“…The BTI aging is usually considered in two different phases: stress and recovery. Several models have predicted the V T shift in devices [10,11] caused by BTI. Since our work is an analysis during a long period of time we simplify the model, explained in detail as follows.…”
Section: Bti Aging Stress and Recovery Phase Parametersmentioning
confidence: 99%
“…Since our work is an analysis during a long period of time we simplify the model, explained in detail as follows. Note that, we have assumed high-k transistors in our work where both N and P transistors experience BTI aging [10].…”
Section: Bti Aging Stress and Recovery Phase Parametersmentioning
confidence: 99%
“…However, for high-k/metal-gate nMOS transistors with significant charge trapping, the PBTI effect can no longer be ignored. In fact, it has been shown that the PBTI effect is more significant than the NBTI effect on 32-nm high-k/metal-gate processes [1]- [2]. Traditional circuits use critical path delay as the overall circuit clock cycle in order to perform effectively.…”
Section: Introductionmentioning
confidence: 99%