A constructive approach towards correctness of synthesis-application within retiming

Abstract

Abstract| This paper is dedicated to correct synthesis. By correct synthesis we mean, that there is a mathematical proof telling us, that the output circuit description ful lls the input circuit description. There are several ways to achieve correct synthesis. In this paper, we p r e s e n t a n o vel approach w h i c h i n tegrates conventional synthesis algorithms thus guaranteeing the same quality of designs. Our approach is fully automatic, although it is based on rule applications within a theorem prover. We compare our results in the area of retiming to other approaches.

Performing high-level synthesis via program transformations within a theorem prover

“…Our hardware description language Gropius can be used to describe circuits at different abstraction levels (see [4]). It provides a consistent concept for a correctness-by-design synthesis style ranging from the algorithmic level down to the gate level.…”

An efficient representation for formal synthesis

“…[MaFo91], Veritas [HaLD89], DDD [JoBo91] or HASH [EiKB97]. [Busc92] and [BaFr96] present reimplementations of the Veritas formal synthesis approach for different theorem provers (LAMBDA and ISABELLE, respectively).…”