A Fast Switchable and Band-Tunable 5–7.5 GHz LNA in 45 nm CMOS SOI Technology for Multi-Standard Wake-up Radios

Ma, Rui; Kreissig, Martin; Ellinger, Frank

doi:10.1109/icecs.2018.8617866

Cited by 3 publications

(9 citation statements)

References 5 publications

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“…The simulated coupling factor is around 0.5 from 5 to 8 GHz. The simulated S 11 for the LNA input using the designed transformer is less than −10 dB at the target band, which shows a 2-dB improvement compared to that from the work in [44].…”

Section: Input Matching Networkmentioning

confidence: 76%

“… Schematic view of the proposed band‐tunable low‐noise amplifier (LNA) based on [44]. Due to application of the thick‐oxide‐gate transistors and the duty‐cycled buffers, the leakage current of this LNA is significantly reduced compared to [44] …”

Section: Circuit Design and Implementationmentioning

confidence: 99%

“…Figure 4 shows a simplified schematic of the proposed LNA which is designed and optimised based on the work presented in [44]. This LNA is constructed by a transformer‐based wide‐band IMN (Figure 5), an LNA core and an LC‐tank based balun as its band selection unit.…”

Section: Circuit Design and Implementationmentioning

confidence: 99%

“…The on‐chip transformer is mainly composed of the inductors L G and L S . According to the conclusion drawn in [44], the inductor L G and L S are designed to have an inductance value of 2.3 and 1 nH with a coupling factor of 0.8, so that the LNA can attain a wide‐band input matching. A 3‐dimensional (3‐D) model and layout of this transformer have been designed using a 3‐D electromagnetic (EM) simulator Sonnet .…”

Section: Circuit Design and Implementationmentioning

confidence: 99%

“…To achieve an optimal RF performance with the least parasitic capacitance, RF transistors with the minimal gate length of 40 nm are used for the transistors or M2 (M1) and M 2 . On account of the design trade‐off between noise figure and power consumption, the

\frac{W}{L}

ratio of M 1 and M 2 was optimised so that the transistors provide a g m of 15.7 mS when the gate bias voltage is fixed to 0.5 V. To suppress the leakage current, thick‐oxide‐gate transistors M 3 − M 5 , instead of normal transistors applied in [44], were used as power switches. In particular, the newly added pMOS M 5 effectively cuts off the drain‐to‐gate leakage current flowing from V DD,AFE into the gate of nMOS M 2 , and also suppresses the drain‐to‐source leakage current flowing from V DD,AFE into the source of M 1 .…”

Section: Circuit Design and Implementationmentioning

confidence: 99%

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A 5.5–7.5‐GHz band‐configurable wake‐up receiver fully integrated in 45‐nm RF‐SOI CMOS

Protze

Ellinger

2022

IET Circuits, Devices & Syst

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This work investigates a 5.5–7.5‐GHz band‐configurable duty‐cycled wake‐up receiver (WuRX) fully implemented in a 45‐nm radio‐frequency (RF) silicon‐on‐insulator (SOI) complementary‐metal‐oxide‐semiconductor (CMOS) technology. Based on an uncertain intermediate frequency (IF) super‐heterodyne receiver (RX) topology, the WuRX analogue front‐end (AFE) incorporates a 5.5–7.5‐GHz band‐tunable low‐power low‐noise amplifier, a low‐power Gilbert mixer, a digitally controlled oscillator (DCO), a 100‐MHz IF band‐pass filter (BPF), an envelope detector, a comparator, a pulse generator and a current reference. By application of duty cycling with a low duty cycle below 1%, the power consumption of the AFE was significantly reduced. In addition, the on‐chip digital bank‐end consists of a frequency divider, a phase corrector, a 31‐bit correlator and a serial peripheral interface. A proof‐of‐concept WuRX circuit occupying an area of 1200 μm by 900 μm has been fabricated in a GlobalFoundries 45‐nm RF‐SOI CMOS technology. Measurement results show that at a data rate of 64 bps, the entire WuRX consumes only 2.3 μW. Tested at 8 operation bands covering 5.5–7.7 GHz, the WuRX has a measured sensitivity between −67.5 dBm and −72.4 dBm at a wake‐up error rate of 10−3. With the sensitivity unchanged, the data rate of the WuRX can be scaled up to 8.2 kbps. To the authors' best knowledge, this work offers the largest RF bandwidth from 5.5 to 7.5 GHz, the most operation channels (≥8) and the fastest settling time (<115 ns) among the WuRXs reported to date.

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Section: Input Matching Networkmentioning

confidence: 76%

Section: Circuit Design and Implementationmentioning

confidence: 99%

Section: Circuit Design and Implementationmentioning

confidence: 99%

Section: Circuit Design and Implementationmentioning

confidence: 99%

\frac{W}{L}

Section: Circuit Design and Implementationmentioning

confidence: 99%

See 3 more Smart Citations

A 5.5–7.5‐GHz band‐configurable wake‐up receiver fully integrated in 45‐nm RF‐SOI CMOS

Protze

Ellinger

2022

IET Circuits, Devices & Syst

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A 3.6 mW 60 GHz Low-Noise Amplifier With 0.6 ns Settling Time for Duty-Cycled Receivers

Morath

Testa

Wagner

et al. 2021

IEEE Microw. Wireless Compon. Lett.

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Design and Implementation of Low Noise Amplifier Operating at 868 MHz for Duty Cycled Wake-Up Receiver Front-End

Ketata

Ouerghemmi²,

Fakhfakh³

et al. 2022

Electronics

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The integration of wireless communication, e.g., in real- or quasi-real-time applications, is related to many challenges such as energy consumption, communication range, quality of service, and reliability. The improvement of wireless sensor networks (WSN) performance starts by enhancing the capabilities of each sensor node. To minimize latencies without increasing energy consumption, wake-up receiver (WuRx) nodes have been introduced in recent works since they can be always-on or power-gated with short latencies by a power consumption in the range of some microwatts. Compared to standard receiver technologies, they are usually characterized by drawbacks in terms of sensitivity. To overcome the limitation of the sensitivity of WuRxs, a design of a low noise amplifier (LNA) with several design specifications is required. The challenging task of the LNA design is to provide equitable trade-off performances such as gain, power consumption, the noise figure, stability, linearity, and impedance matching. The design of fast settling LNA for a duty-cycled WuRx front-end operating at a 868 MHz frequency band is investigated in this work. The paper details the trade-offs between design challenges and illustrates practical considerations for the simulation and implementation of a radio frequency (RF) circuit. The implemented LNA competes with many commercialized designs where it reaches single-stage 12 dB gain at a 1.8 V voltage supply and consumes only a 1.6 mA current. The obtained results could be made tunable by working with off-the-shelf components for different wake-up based application exigencies.

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A Fast Switchable and Band-Tunable 5–7.5 GHz LNA in 45 nm CMOS SOI Technology for Multi-Standard Wake-up Radios

Cited by 3 publications

References 5 publications

A 5.5–7.5‐GHz band‐configurable wake‐up receiver fully integrated in 45‐nm RF‐SOI CMOS

A 5.5–7.5‐GHz band‐configurable wake‐up receiver fully integrated in 45‐nm RF‐SOI CMOS

A 3.6 mW 60 GHz Low-Noise Amplifier With 0.6 ns Settling Time for Duty-Cycled Receivers

Design and Implementation of Low Noise Amplifier Operating at 868 MHz for Duty Cycled Wake-Up Receiver Front-End

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