A high-k Y2O3 charge trapping layer for nonvolatile memory application

Pan, Tung-Ming; Yeh, Wen-Wei

doi:10.1063/1.2919086

Cited by 28 publications

(8 citation statements)

References 14 publications

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“…Among these criteria, the memory window, defined as the shift of threshold voltages when a device is undergone programing and erasing processes, is extremely important and represents the ability of data storage 16 17 18 . Tremendous efforts have been made to enlarge the memory window by employing novel materials, optimizing available candidates or designing novel device architectures and so on 18 19 20 21 22 . Although impressive achievements have been obtained, there are always limitations on materials selection and device architecture.…”

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confidence: 99%

Photo-reactive charge trapping memory based on lanthanide complex

Zhuang

Zhou

et al. 2015

Sci Rep

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Traditional utilization of photo-induced excitons is popularly but restricted in the fields of photovoltaic devices as well as photodetectors, and efforts on broadening its function have always been attempted. However, rare reports are available on organic field effect transistor (OFET) memory employing photo-induced charges. Here, we demonstrate an OFET memory containing a novel organic lanthanide complex Eu(tta)3ppta (Eu(tta)3 = Europium(III) thenoyltrifluoroacetonate, ppta = 2-phenyl-4,6-bis(pyrazol-1-yl)-1,3,5-triazine), in which the photo-induced charges can be successfully trapped and detrapped. The luminescent complex emits intense red emission upon ultraviolet (UV) light excitation and serves as a trapping element of holes injected from the pentacene semiconductor layer. Memory window can be significantly enlarged by light-assisted programming and erasing procedures, during which the photo-induced excitons in the semiconductor layer are separated by voltage bias. The enhancement of memory window is attributed to the increasing number of photo-induced excitons by the UV light. The charges are stored in this luminescent complex for at least 104 s after withdrawing voltage bias. The present study on photo-assisted novel memory may motivate the research on a new type of light tunable charge trapping photo-reactive memory devices.

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confidence: 99%

Photo-reactive charge trapping memory based on lanthanide complex

Zhuang

Zhou

et al. 2015

Sci Rep

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“…Meanwhile, the th reduced more than 0.5 V at an applied voltage of −8 V with a pulse width of 0.1 s. Figure 5 shows the retention characteristic of the MYTOS transistors. The DS versus GS characteristic was first measured with a sweep voltage from −3 V to 3 V to determine [11][12][13][14][15][16][17][18][19][20]. The MYTOS shows faster programming time of 10 ns at a low voltage of 6 V.…”

Section: Resultsmentioning

confidence: 99%

Charge-Trapping Devices Using Multilayered Dielectrics for Nonvolatile Memory Applications

Shih

Cheng

Lee

et al. 2013

Advances in Materials Science and Engineering

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Charge-trapping devices using multilayered dielectrics were studied for nonvolatile memory applications. The device structure is Al/Y2O3/Ta2O5/SiO2/Si (MYTOS). The MYTOS field effect transistors were fabricated using Ta2O5as the charge storage layer and Y2O3as the blocking layer. The electrical characteristics of memory window, program/erase characteristics, and data retention were examined. The memory window is about 1.6 V. Using a pulse voltage of 6 V, a threshold voltage shift of ~1 V can be achieved within 10 ns. The MYTOS transistors can retain a memory window of 0.81 V for 10 years.

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“…Furthermore, the improvements in P/E speed and retention time have been reported by introducing the high-k CTLs. There have been numerous works introducing the high-k CTLs such as Al 2 O 3 , Ta 2 O 5 , ZrO 2 , and HfO 2 and their multi-stack structures in Si-based CTFs [13]- [18]. Among them, a HfO 2 has been widely employed as a CTL because of its wide band gap (∼5.7 eV), high dielectric constant (∼25), and charge-storage capability even at a low voltage [19]- [20].…”

Section: Introductionmentioning

confidence: 99%

Impacts of HfO₂/ZnO Stack-Structured Charge-Trap Layers Controlled by Atomic Layer Deposition on Nonvolatile Memory Characteristics of In-Ga-Zn-O Channel Charge-Trap Memory Thin-Film Transistors

Yoon

2019

IEEE J. Electron Devices Soc.

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We fabricated the charge-trap memory thin film transistors (CTM-TFTs) using InGaZnO (IGZO) active channel and HfO 2 /ZnO stack-structured charge-trap layer (CTL). To investigate the effects of the number and thickness of HfO 2 layers inserted between the ZnO within the stack structured CTLs on the device characteristics, 2-nm-thick HfO 2 thin films were inlaid once, twice, and four times, and 4-nm-thick HfO 2 layers were introduced twice between the ZnO layers. The CTM-TFTs using the stack structured CTLs with 4-nm-thick HfO 2 layers showed good memory characteristics, including large memory window (MW) of 25 V and rapid program/erase (P/E) speed of 500 μs because of high total trap density of HfO 2 with a sufficient thickness to provide charge-trap centers. On the contrary, relatively narrow MW of 16 V and slower P/E speed of 100 ms were obtained for memory device using the stacked CTL with four HfO 2 layers of 2 nm. The HfO 2 layer with a thickness as thin as 2 nm was supposed to act as just dielectric films deactivating the trapping or migration of electron charges due to too thin film thickness. The gate-stack structures confirmed from STEM images suggested that the modulations in memory device characteristics with different CTL structures resulted from the variations in designs of stack structured CTLs when the interface qualities within the gate-stacks were well prepared. Moreover, the detailed fabrication conditions were found to be important control parameters to reproducibly obtain reliable memory device characteristics.INDEX TERMS High-k material, HfO 2 , ZnO, ALD, IGZO charge-trap memory. SO-YEONG NA was born in South Korea in 1995. She received the B.S. degree from the

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A high-k Y2O3 charge trapping layer for nonvolatile memory application

Cited by 28 publications

References 14 publications

Photo-reactive charge trapping memory based on lanthanide complex

Photo-reactive charge trapping memory based on lanthanide complex

Charge-Trapping Devices Using Multilayered Dielectrics for Nonvolatile Memory Applications

Impacts of HfO₂/ZnO Stack-Structured Charge-Trap Layers Controlled by Atomic Layer Deposition on Nonvolatile Memory Characteristics of In-Ga-Zn-O Channel Charge-Trap Memory Thin-Film Transistors

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A high-k Y2O3 charge trapping layer for nonvolatile memory application

Cited by 28 publications

References 14 publications

Photo-reactive charge trapping memory based on lanthanide complex

Photo-reactive charge trapping memory based on lanthanide complex

Charge-Trapping Devices Using Multilayered Dielectrics for Nonvolatile Memory Applications

Impacts of HfO2/ZnO Stack-Structured Charge-Trap Layers Controlled by Atomic Layer Deposition on Nonvolatile Memory Characteristics of In-Ga-Zn-O Channel Charge-Trap Memory Thin-Film Transistors

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Impacts of HfO₂/ZnO Stack-Structured Charge-Trap Layers Controlled by Atomic Layer Deposition on Nonvolatile Memory Characteristics of In-Ga-Zn-O Channel Charge-Trap Memory Thin-Film Transistors