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Optical, electrical, and structural characteristics of yttrium oxide films deposited on plasma etched silicon substrates J.The structural properties and electrical characteristics of thin Nd 2 O 3 gate oxides were deposited on silicon substrates by reactive rf sputtering. The structural and morphological features of these films were studied, as a function of the growth conditions ͑three various argon-to-oxygen flow ratios: 20/ 5, 15/ 10, and 12.5/ 12.5 and temperature from 600 to 800°C͒, by x-ray diffraction, atomic force microscopy, and x-ray photoelectron spectroscopy. It is found that Nd 2 O 3 dielectrics with a 12.5/ 12.5 ratio condition annealed at 700°C exhibit a thinner capacitance equivalent thickness and excellent electrical properties, including the electric breakdown field, the interface trap density, the hysteresis, and frequency dispersion in the capacitance-voltage curves. This condition is suggested to the reduction of the interfacial SiO 2 and silicate formation, and the small of surface roughness due to the optimization of oxygen in the metal oxide film.

We report on a high-k lanthanum oxide ͑La 2 O 3 ͒ gate dielectric deposited on Si substrate by reactive radio-frequency sputtering for Al and Al/TaN metal gate electrode. The La 2 O 3 gate dielectric film with Al/TaN gate electrode exhibited excellent electrical properties such as low equivalent oxide thickness, high electric field breakdown, excellent reliability, and almost no hysteresis in C-V curves comparable to that with Al gate electrode. This indicates that Al/TaN metal gate can inhibit Si atoms outdiffusion from Si substrate and the diffusion of Al atoms in the oxide from secondary ion mass spectrometry data. Moreover, post-processing treatments can passivate a large amount of trapped charge at defect sites.Aggressive scaling of gate length and gate oxide thickness in complementary metal oxide semiconductor ͑CMOS͒ transistors gives rise to the problems of poly-Si gate depletion, high gate resistance, and boron penetration from the p + -doped poly-Si gate into the channel region. 1 To reduce the high gate resistance and gate depletion problems, the conventional poly-Si gate electrode must be substituted by metal gate electrode. A metal gate material not only eliminates the gate depletion and boron penetration problems, but also greatly reduces the gate sheet resistance. 2 In addition, high dielectric constant ͑high-k͒ materials have attracted much attention for future gate dielectrics, to reduce gate leakage current and power consumption that are unacceptably high. 3 The application of high-k gate dielectric and metal gate to CMOS transistors fabrication is an important issue in the sub-65 nm regime because the high-k gate dielectric and metal gate technology could realize low gate resistance ͑high speed device͒, no gate depletion ͑reduction of the electrical gate oxide thickness͒, no boron penetration from gate into the channel, and low gate leakage current, that is, the scaling down of transistor feature size and the improvement of device performance. [4][5][6] Recent research on high-k dielectrics has primarily focused on metal oxides. Among these, lanthanum oxide ͑La 2 O 3 ͒ seems to be a promising candidate that has attracted the attention of many research groups worldwide. 7,8 Note that La 2 O 3 films are considered not only for its high dielectric constant, but also because the large bandgap, the good thermodynamic stability in contact with silicon substrates and the compatibility with standard CMOS fabrication processes. 9 In this paper, a high-k lanthanum oxide gate dielectric grown by reactive radio-frequency ͑rf͒ sputtering for Al and Al/TaN metal gate on physical properties and electrical characteristics has been investigated. of an area of 3.14 ϫ 10 −4 cm 2 were fabricated on 4 in. p-type Si wafers with a resistivity of 7-11 ⍀-cm. After a standard RCA cleaning of the silicon wafer and a dilute 1% HF strip for 1 min, thin La 2 O 3 films ͑ϳ9 nm͒ were deposited by reactive rf sputtering at low pressure of about 10 −6 Torr in diluted O 2 ͑Ar/O 2 = 5/2͒ ambient, subsequent post-deposition annealin...

Silicon-oxide-high-κ -oxide-silicon memory using a high-κ Y 2 O 3 nanocrystal film for flash memory application Dependence of charge trapping and tunneling on the silicon-nitride ( Si 3 N 4 ) thickness for tunnel barrier engineered nonvolatile memory applications Appl. Phys. Lett. 94, 053508 (2009);

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