A Low-Voltage 5-GHz Downconversion Mixer Employing A Second Harmonic Injection Linearization Technique

Theodoratos, G.; Papananos, Y.; Vitzilaios, G.

doi:10.1109/tcsii.2007.903791

Cited by 14 publications

(3 citation statements)

References 13 publications

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“…It consists of two independent networks containing one free analog node each, illustrated as thick lines labeled and . Unlike time-continuous mixers [35], sampling mixers use a phase-locked loop (PLL) to sample the input signal under particular phase conditions (e.g., at selected maxima illustrated as " " signs in Fig. 2) delivering the envelope for an amplitude-modulated (AM) signal.…”

Section: Introductionmentioning

confidence: 99%

An Analog-Node Model for VHDL-Based Simulation of RF Integrated Circuits

Schubert

2009

IEEE Trans. Circuits Syst. I

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This paper describes a very-high-speed integrated-circuit hardware description language (VHDL)-based analog-node model, an associated driver component for the mixed-signal event-driven (MixED) simulation technique, and some primitive device models applied to radio-frequency integrated circuits. With the presented MixED method, analog circuits are modeled as a composition of controlled sources. Unlike other VHDL-based analog simulation methods, these MixED sources compute not only a real number representing an output voltage but also an output impedance. This allows the outputs of several MiXED sources to be connected in order to drive the same node signal . The voltage of this record-type signal is automatically computed at its element by resolution functions in compliance with Kirchhoff's current law. The data structure of the node signal , its self-defined resolution functions, and an associated driver component are presented and discussed to meet different simulation requirements, such as speed, versatility, current accuracy, and adaptive time stepping. Several examples demonstrate how to behaviorally model mixed-signal components with this method with an emphasis on the simulation of a heterodyne receiver. Simulation speeds are compared to VHDL-AMS tools.Index Terms-Analog, mixed signal, modeling, RF, RF integrated circuit (RFIC), simulation, system on a chip (SoC), verification, very-high-speed integrated-circuit hardware description language (VHDL).

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Section: Introductionmentioning

confidence: 99%

An Analog-Node Model for VHDL-Based Simulation of RF Integrated Circuits

Schubert

2009

IEEE Trans. Circuits Syst. I

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“…This trend has increased with the emergence of standards using nonconstant envelope modulations [6] [7] [8]. Moreover, keep a good linearity for a power amplifier becomes increasingly complex with the decrease of the size of the transistors.…”

Section: Cartesian Feedback Descriptionmentioning

confidence: 99%

Linearization of a 65nm CMOS power amplifier with a Cartesian Feedback for W-CDMA standard

Delaunay

Deltimple

Belot

et al. 2009

2009 Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference

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“…Various techniques for the linearization of the mixer (Ellis, 1998;Kim et al, 2002;Liang et al, 2008) have been proposed in the literature, such as feedforward, predistortion, a technique based on transconductance cancelation of the third-order, techniques based on the insertion of the second harmonic and/or the difference frequency signal in the analog domain (Ock et al, 2001;Lou et al, 2008;Theodoratos et al, 2007). This paper analyses the impact of the two different linearization techniques that use the modified signals in the baseband in order to linearize the mixer used as a downconverter (Atanasković et al, 2013(Atanasković et al, , 2015.The modified baseband signal is the product of the secondorder nonlinearity of a nonlinear system induced by the useful baseband signal.…”

Section: Introductionmentioning

confidence: 99%

Mixer Linearization by Modified Baseband Signals

Đorić¹,

Males-Ilic²,

Atanasković³

et al. 2016

Proceedings of the International Scientific Conference - Sinteza 2016

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Abstract:In this paper, the linearization of the Gilbert downconverter mixer at the receiver is performed by two different methods that exploit the modified baseband signals. The signals for linearization in both methods are formed and processed in digital domain after demodulation. In the first method, the modified baseband signal is adjusted in amplitude and polarity and injected at the mixer. The linearization signals in the second method, which are also formed in the baseband and set on the appropriate amplitude and phase, modulate the fundamental carrier second harmonic and then lead to the mixer. The linearization effects of the linearization methods on the thirdand fifth-order intermodulation products are compared for the case when the signals for linearization are driven at the transistors' drain of the RF stage differential pair in the Gilbert cell. The influence of the linearization signals delay on the results is analysed as well.

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A Low-Voltage 5-GHz Downconversion Mixer Employing A Second Harmonic Injection Linearization Technique

Cited by 14 publications

References 13 publications

An Analog-Node Model for VHDL-Based Simulation of RF Integrated Circuits

An Analog-Node Model for VHDL-Based Simulation of RF Integrated Circuits

Linearization of a 65nm CMOS power amplifier with a Cartesian Feedback for W-CDMA standard

Mixer Linearization by Modified Baseband Signals

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