The sense amplifier is one of the most important components of semiconductor memories used to sense stored date. This plays an important role to reduce the overall sensing delay and voltage. Earlier voltage mode sense amplifiers are used to sense the date it sense the voltage difference at bit and bitb lines but as the memory size increase the bit line and date line capacitances increases. As a result large time is required by capacitance to discharge so sensing delay and power dissipation increase. Used that sense the current directly from bit and bitb lines and reduce the sensing delay. This technique is used in current mode sense amplifiers. This thesis work explores the design and analysis of current mode sense amplifier using Tanner tool (14.0) version. The simulation is carried out at 1.5V / 0.13um technology using tanner (14.0 Version) tool. The results are verified with the existing results at 1.8V / 0.18um CMOS technology.