A New Generation of SiC Schottky Diodes with Improved Thermal Management and Reduced Capacitive Losses

Abstract

With the help of an improved die attach the Rth,jc of SiC Schottky diodes can be reduced by 40-50% at a given chip size. This enables a significant higher power density for these SiC diode chips, resulting in a chip shrink of ~ 35% for a given nominal current. This has a significant impact not only on the cost position of the device but also on the switching performance of the diodes, as their capacitive charge directly scales with the chip area. Of course these advantages are accompanied by a small penalty in static losses as the Vf of the diodes at nominal current also slightly increases by the chip shrink. However, the reduction of switching losses dominates upon the marginally increased static losses besides full load operation conditions (which are pretty exceptional in today’s SiC Schottky diode applications) combined with frequencies below 130 kHz. This allows a better competitive positioning against fast Si-based diodes and improved system efficiency at the same time.

Performance of a 650V SiC Diode with Reduced Chip Thickness

“…This is only possible in conjunction with diffusion solder die attach (see next paragraph). As the capacitive charge per area -the main contributor for switching losses of SiC MPS diodes -stays unchanged, it is now possible to improve the conduction loss dominated high low efficiency power supplies without jeopardizing the switching loss dominated low load efficiency [2] by increasing the active area of the diode. Besides the advantages of a reduced chip thickness with respect to the electrical performance of a 650V diode, there is also a strong benefit with respect to power dissipation from the chip to the underlying copper of either a discrete leadframe or a DCB module base-plate.…”

“…This is especially true, if the connection layer between the SiC chip and the mentioned copper base is thin and negligible with respect to its contribution to the thermal resistance. This can be achieved with a so called diffusion soldering process using a very thin (< 2 µm) Au-alloy interconnection layer as described in [2]. In this case, the reduced thermal capacitance of a thin chip is not a disadvantage as the thermal flux can propagate into the copper with no noticeable barrier.…”

“…In the 10 years after the 1 st commercial introduction of 600/650V SiC Schottky diodes into the power market a lot of innovations already improved their cost performance ratio, e.g. the utilization of a merged pn-Schottky (MPS) structure to improve surge current capability and overall ruggedness [1] and the application of a new die attach technology to allow a doubling of the power density [2]. As a next step we now want to address the significant contribution of the substrate resistivity (~ 70% at room temperature) to the total differential resistance of the diodes.…”

SiC MPS Devices: One Step Closer to the Ideal Diode

“…Since the market introduction of the first silicon carbide (SiC) Schottky diode in 2001 [1] several revolutionary steps of development have been taken to carry the performance of these devices to extremes. The surge current ruggedness has been improved by the introduction of a merged pn-Schottky (MPS) structure [2], thermal and switching losses have been significantly reduced by engineering of the die attach technology [3], and last but not least the parasitic series resistance of the substrate has been cut at least by half by employment of a thin wafer process [4]. Today the market acceptance of SiC Schottky diodes is already quite large with a number of players [5,6].…”

A New 1200V SiC MPS Diode with Improved Performance and Ruggedness

“…In comparison with the pure Schottky diodes, those devices benefit of a hexagonal cell structure, which allows an optimum area ratio between p-areas and Schottky areas [2] resulting in a much better stability against high current and high voltage spikes as well as very steep dV/dt transients. Meanwhile a variety of such diodes are in the market with further improved properties in comparison to this original generation enabled by advanced soldering processes [3,4] and thin wafer technology [5,6]. In this paper we introduce an extension of the MPS concept to 1200V.…”