A novel 0.35&amp;#x00B5;m 800V BCD technology platform for offline applications

Venturato, M.; Cantone, G.; Ronchi, F.; Toia, Fabrizio

doi:10.1109/ispsd.2012.6229105

Cited by 14 publications

(7 citation statements)

References 2 publications

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“…3) are proposed to solve this problem [10,11] . Figure 3a shows a silicon-based BCD process platform, which integrates 40-700 V HV LDMOS devices, LV CMOS devices, and bipolar transistors [12][13][14][15] . All these devices can be fabricated under the same process.…”

Section: Hvics and Bcd Processmentioning

confidence: 99%

Review of technologies for high-voltage integrated circuits

Zhang

Zhu

et al. 2022

Tsinghua Sci. Technol.

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High-Voltage power Integrated Circuits (HVICs) are widely used to realize high-efficiency power conversions (e.g., AC/DC conversion), gate drivers for power devices and LED lighting, and so on. The Bipolar-CMOS-DMOS (BCD) process is proposed to fabricate devices with bipolar, CMOS, and DMOS modes, and thereby realize the single-chip integration of HVICs. The basic integrated technologies of HVICs include High-Voltage (HV) integrated device technology, HV interconnection technology, and isolation technology. The HV integrated device is the core of HVICs. The basic requirements of the HV integrated device are high breakdown voltage, low specific on-resistance, and process compatibility with low-voltage circuits. The REduced SURFace field (RESURF) technology and junction termination technology are developed to optimize the surface field of integration power devices and breakdown voltage. Furthermore, the ENhanced DIelectric layer Field (ENDIF) and REduced BULk Field (REBULF) technologies are proposed to optimize bulk fields. The double/triple RESURF technologies are further developed, and the superjunction concept is introduced to integrated power devices and to reduce the specific on-resistance. This work presents a comprehensive review of these technologies, including the innovation technologies of the authors' group, such as ENDIF and REBULF, substrate termination technology prospective integrated technologies and HVICs in wide band gap semiconductor materials are also discussed.

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Section: Hvics and Bcd Processmentioning

confidence: 99%

Review of technologies for high-voltage integrated circuits

Zhang

Zhu

et al. 2022

Tsinghua Sci. Technol.

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“…But the performance of this class of devices is sensitive to the optimum charge balance in the drift region, which is in general at the silicon surface, and thus it is strongly impacted by mobile charges accumulated in the overlying isolation and mold-compound passivation on top [5]. For this reason, additional metal and/or poly-silicon field-plates and floating-rings are required to stabilize the surface electric field [6,7], even if they might limit the maximum intrinsic performance of the device. The understanding of mobile charge transport at the molding compound surface is thus of primary importance to improve the power device performance and reliability at the design stage.…”

Section: Introductionmentioning

confidence: 99%

Electrical characterization of epoxy-based molding compounds for next generation HV ICs in presence of moisture

Cornigli

Reggiani

Gnudi

et al. 2018

Microelectronics Reliability

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“…For NLDMOS, one well-known technical approach is to introduce a p-type doped layer into n-type doped drift region and then realize the double RESURF or triple RESURF effect [3,4]. This approach also has been extensively studied by many researchers [5,6].…”

Section: Introductionmentioning

confidence: 99%

The Investigation of Field Plate Design in 500 V High Voltage NLDMOS

Liu¹,

Xu²,

Jiang³

et al. 2015

Advances in Condensed Matter Physics

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This paper presents a 500 V high voltage NLDMOS with breakdown voltage (VBD) improved by field plate technology. Effect of metal field plate (MFP) and polysilicon field plate (PFP) on breakdown voltage improvement of high voltage NLDMOS is studied. The coeffect of MFP and PFP on drain side has also been investigated. A 500 V NLDMOS is demonstrated with a 37 μm drift length and optimized MFP and PFP design. Finally the breakdown voltage 590 V and excellent on-resistance performance (Rsp= 7.88 ohm * mm2) are achieved.

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A novel 0.35µm 800V BCD technology platform for offline applications

Cited by 14 publications

References 2 publications

Review of technologies for high-voltage integrated circuits

Review of technologies for high-voltage integrated circuits

Electrical characterization of epoxy-based molding compounds for next generation HV ICs in presence of moisture

The Investigation of Field Plate Design in 500 V High Voltage NLDMOS

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