A Novel Flow Control Mechanism to Avoid Multi-Point Progressive Blocking in Hard Real-Time Priority-Preemptive NoCs

Abstract

The recently uncovered problem of multi-point progressive blocking (MPB) has significantly increased the complexity of schedulability analysis of priority-preemptive wormhole networks-on-chip. While state-of-the-art analysis is currently deemed safe, there is still significant inherent pessimism when it comes to considering backpressure issues caused by downstream indirect interference. In this paper, we attempt to simplify the problem by considering a novel flow control protocol that can avoid backpressure issues, enabling simpler schedulability analysis approaches to be used. Rather than construct the analysis to fit the protocol, we modify the protocol so that effective analysis applies. We describe the changes to a baseline wormhole router in order to implement the proposed protocol, and comment on the impact on hardware overheads. We also examine the number of routers that actually require these changes. Comparative analysis of FPGA implementations show that the hardware overheads of the proposed NoC router are comparable or lower than those of the baseline, while analytical comparison shows that the proposed approach can guarantee schedulability in up to 77% more cases.

Real-Time Guarantees in Routerless Networks-on-Chip

“…This provided more evidence that the MPB problem is not an artifact of a specific type of analysis, but instead is an inherent issue that comes with wormhole networks and backpressure (albeit a rare one -it took more than a decade for it to be uncovered). Accordingly, some of the latest works in the area of real-time NoCs are attempts to avoid or control backpressure as a way to prevent MPB, but they either rely on global wires which may prevent an efficient and reliable implementation in silicon [23] [33] [27] or require complex memory management in every NoC core [5].…”

Partial order based non-preemptive communication scheduling towards real-time networks-on-chip

“…To guarantee the tightness of the worst-case latency, there are two recent works. The one [6] is proposed by Burns et al with a new distributed flow control mechanism. This communication scheduling approach can improve the latency bound tightness by eliminating the MPB latency [19,40] (i.e., backpressure), but challenges exist on tile memory management.…”