Proceedings of the 13th International Symposium on Power Semiconductor Devices &Amp; ICs. IPSD '01 (IEEE Cat. No.01CH37216)
DOI: 10.1109/ispsd.2001.934575
|View full text |Cite
|
Sign up to set email alerts
|

A novel process technique for fabricating high reliable trench DMOSFETs using self-align technique and hydrogen annealing

Abstract: A novel process technique for fabricating trench DMOSFETs using 3 mask layers is realized in order to obtain cost-effective production capability, higher cell density and current driving capability, and higher reliability.A unit cell with a cell pitch of 2.3-2.4 pm and a channel density of 1 00McelVin2 are obtained. Specific on-resistance is 0.36 mR.cm2 with a blocking voltage of 43 V. The time to breakdown of gate oxide grown on the hydrogen annealed trench surface is much longer than that of the gate oxide g… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...

Citation Types

0
0
0

Publication Types

Select...
2
1

Relationship

0
3

Authors

Journals

citations
Cited by 3 publications
references
References 4 publications
0
0
0
Order By: Relevance