A robust spacer gate process for deca-nanometer high-frequency MOSFETs

A novel self-aligned process for platinum silicide nanowires

“…This process is therefore robust in process control as well as in thickness and composition scalability. The process has further been successfully employed for the fabrication of ultralong (400 lm) PtSi x nanowires using polycrystalline Si (poly-Si) nanowires defined by a sidewall transfer lithography (STL) [9][10][11][12].…”

Polysilicon Nanowire Transistors and Arrays Fabricated With the Multispacer Technique

“…The spacer technique has been applied in order to fabricate fin field effect transistors (Fin FETs) with shorter gate length and higher performance than lithographically defined MOS FETs [15]- [18]. Devices made with the spacer technique have been deployed in other fields as well, such as optical applications [19], high-frequency transistors [20] and biosensing [21].…”

“…Unlike previous approaches that used the MSPT to define simple layers of parallel NWs [4], [13], [20], and those that used the MSPT to define nanomolds to pattern NWs [19], [21], [23], this paper demonstrates for the first time 1) that not only layers of parallel NWs, but also dense NW crossbars can be fabricated with the MSPT, and 2) that MSPT-based crossbars can be obtained in a self-aligned and maskless process without the utilization of any nanomold. The scalability of the as-fabricated poly-Si crossbars is studied, and the characterization of the access devices operating as polySiNW FETs is performed for the first time.…”

NEMS by Sidewall Transfer Lithography

“…STL is based on the transformation of thin layers deposited on mesas into nanoscale ribs [11][12][13][14][15][16][17], slots [18][19][20][21] and vertically stacked multilayers [22][23][24]. It was originally developed for CMOS applications [25], and processes for FinFET fabrication have received increasing attention in recent years with the drive towards strongly submicron channels [26][27][28][29][30][31][32]. STL has also been applied to nanowire arrays in various materials including silicon, diamond, platinum, platinum silicide and nickel silicide, with applications ranging from sensing to catalytic surfaces [33][34][35][36][37][38].…”