A simplified means for computation for interconnect distributed capacitances and inductances

Matthaei, G.L.; Chinn, G.C.; Plott, C.H.; Dagli, N.

doi:10.1109/43.125099

Cited by 25 publications

(12 citation statements)

References 5 publications

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“…4. L u , C u , R u and G u are determined independently using a program known as Tranline developed earlier [14]. This is a method of moments based simulator which is shown to be very accurate.…”

Section: Design Considerationsmentioning

confidence: 99%

Traveling Wave Electrodes for Substrate Removed Electro-Optic Modulators With Buried Doped Semiconductor Electrodes

Dogru

Shin

Dagli

2013

IEEE J. Quantum Electron.

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This paper reports theoretical and experimental studies of traveling wave electrodes suitable for wide bandwidth operation of ultra-low voltage substrate removed compound semiconductor electro-optic modulators. These modulators use submicron epitaxial layers removed from their substrates and contain buried electrodes made out of doped semiconductors. This approach enables very uniform submicron electrode gap resulting in ultra-low voltage operation. Traveling wave electrodes suitable for wide bandwidth and low voltage operation are designed using loaded line approach. Electrode capacitance and resistance are reduced significantly using staircase waveguides and n-i-p-i-n epitaxial layer designs. A very accurate modeling of the electrode is introduced. Such electrodes are fabricated and characterized up to 35 GHz. Experimental and modeling results are found to agree very well, making the design of such electrodes possible. Theoretical and experimental results show that subvolt modulators with electrical to optical bandwidths in excess of 35 GHz are possible.

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Section: Design Considerationsmentioning

confidence: 99%

Traveling Wave Electrodes for Substrate Removed Electro-Optic Modulators With Buried Doped Semiconductor Electrodes

Dogru

Shin

Dagli

2013

IEEE J. Quantum Electron.

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“…In the past a lot of research effort has been devoted to the areas of inductance computation [8,9,2], inductance extraction using both numerical and experimental techniques [2,10,11,12,13,14,15,16] and modelling of on-chip inductance [2,17,18,19] in integrated circuits. However, accurate inductance modelling still remains a challenging problem.…”

Section: Inductance Effects In Dsm Interconnectsmentioning

confidence: 99%

Analysis of on-chip inductance effects using a novel performance optimization methodology for distributed RLC interconnects

Banerjee

Mehrotra

2001

Proceedings of the 38th Conference on Design Automation - DAC '01

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This work presents a new and computationally efficient performance optimization technique for distributed RLC interconnects based on a rigorous delay computation scheme. The new optimization technique has been employed to analyze the impact of line inductance on the circuit behaviour and to illustrate the implications of technology scaling on wire inductance. It is shown that reduction in the driver capacitance and output resistance with scaling makes deep submicron (DSM) designs increasingly susceptible to inductance effects. Also, the impact of inductance variations on performance has been quantified. Additionally, the impact of the wire inductance on catastrophic logic failures and IC reliability issues have been analyzed.

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“…This is the sum of unloaded line capacitance C u and junction capacitance C j of the p-i-n diode with thicker i region. Using the approach in [10] C u is found to be 1.3 pF∕cm. C j can be calculated using the simple parallel plate approximation of C j 2ε r ε 0 wl∕tp∕d, where l is the electrode length.…”

mentioning

confidence: 96%

“…In the design and analysis, this model is solved numerically to find Y M values. The unloaded line parameters are determined using an earlier developed program known to be very accurate [10]. Once the entire electrode model is developed, microwave attenuation coefficient α, phase velocity v ph , and characteristic impedance Z 0 , of the modulator electrode can be calculated using the well-known transmission line equations.…”

mentioning

confidence: 99%

Electrodes for wide-bandwidth substrate-removed electro-optic modulators

2013

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This Letter is on wide-bandwidth electrodes suitable for ultralow voltage substrate-removed compound semiconductor electro-optic modulators. Using a loaded line approach, traveling wave electrodes suitable for wide-bandwidth and low-voltage operation were studied theoretically and experimentally up to 35 GHz. Using staircase waveguides and n-i-p-i-n epilayer designs, electrode capacitance and resistance were reduced significantly. Experimental and modeling results are found to agree very well. Theoretical and experimental results indicate that subvolt modulators with electrical to optical bandwidths in excess of 30 GHz are possible.

show abstract

A simplified means for computation for interconnect distributed capacitances and inductances

Cited by 25 publications

References 5 publications

Traveling Wave Electrodes for Substrate Removed Electro-Optic Modulators With Buried Doped Semiconductor Electrodes

Traveling Wave Electrodes for Substrate Removed Electro-Optic Modulators With Buried Doped Semiconductor Electrodes

Analysis of on-chip inductance effects using a novel performance optimization methodology for distributed RLC interconnects

Electrodes for wide-bandwidth substrate-removed electro-optic modulators

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