A switched current sigma delta modulator using a low distortion feedfoward topology

Prior, Cesar Augusto; Rodrigues, Cesar Ramos

doi:10.1109/mwscas.2010.5548808

Cited by 6 publications

(3 citation statements)

References 14 publications

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“…To overcome this problem, circuit strategies like low-distortion topology with feedforward paths, successfully reported in literature for SC [4] and SI [5] circuits, could be used. This technique reduces the signal processing in the integrators path, decreasing conductance variations that give rise to harmonic distortion.…”

Section: Introductionmentioning

confidence: 99%

High-order low-distortion switched-current cascade 2–2–2 ΣΔ modulator

Blumer

Prior

Aguirre

et al. 2012

2012 IEEE 3rd Latin American Symposium on Circuits and Systems (LASCAS)

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This paper presents the design and simulation results of a switched-current (SI) MASH 2-2-2 Sigma-Delta Modulator (Σ∆M). The modulator makes use of a low-distortion swing suppression topology which is highly suitable for wideband and high-order modulators. Simulation results reveal that peak signal to noise plus distortion ratio (SNDR) is 83.5 dB at 5 MHz sampling rate with 10 kHz bandwidth. The modulator was designed in a 0.6 µm CMOS technology and the power dissipation is about 45 mW.

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Section: Introductionmentioning

confidence: 99%

High-order low-distortion switched-current cascade 2–2–2 ΣΔ modulator

Blumer

Prior

Aguirre

et al. 2012

2012 IEEE 3rd Latin American Symposium on Circuits and Systems (LASCAS)

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“…The first one is mismatch on fabrication. Next, we ponder the charge injection error [2][3]. The third one is transmission error.…”

Section: Introductionmentioning

confidence: 99%

A switched-current third-order oversampling modulator with coupled differential replica FMC

Sung

Lai

Chang

2012

Anti-Counterfeiting, Security, and Identification

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This paper presents a switched-current (SI) third-order sigma-delta modulator (SDM) which consists of a current-mode sample-and-hold (S/H) and a feedback topology to reduce the input impedance at input terminal, and a common-mode feed-forward (CMFF) circuit to improve the common-mode offset at output terminal. Besides, a SI feedback memory cell (FMC) with low clock feedthrough (CFT) error is presented with a coupled differential replica (CDR) topology. The proposed third-order SDM is designed and implemented with standard 0.35-μm CMOS technology. The simulation results show that the peak value of signal to noise plus distortion ratio (SNDR) is roughly 104.9 dB at the sampling rate of 10.24 MHz and the signal bandwidth of 80 kHz. However, the power dissipation of 33 mW is too large at power supply voltage of 2.5 V.

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“…Unfortunately, one of the main drawbacks for switchedcurrent implementation is the non-linearity of SI memory cells [1] -that generates harmonic distortion. To overcome this problem, circuit strategies like low-distortion topology with feedforward paths, successfully reported in literature for SC [4] and SI [5] circuits, could be used to alleviate the signal processing in the integrator path, decreasing conductance variations that gives rise to harmonic distortion. The goal here is to extend this approach to SI-Σ∆ cascade modulators and to enable the design of stable high-orders Σ∆ modulators with relaxed restrictions imposed to SI integrators.…”

Section: Introductionmentioning

confidence: 99%

14-bit DR, 20 kHz BW, 2-2 MASH SI-Σ㪔 modulator using low-distortion feedforward topology

Blumer

Prior

Batista

2012

2012 IEEE International Symposium on Circuits and Systems

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This paper presents the design and simulation results of a switched-current (SI) 2-2 MASH Sigma-Delta Modulator (Σ∆M). The modulator is composed by a low-distortion swing suppression topology which is highly suitable for wideband applications. It was realized using fully-differential circuitry with common-mode feedback. The circuit performs 14-bit dynamic range (DR) up to 5 MHz clock frequency and 20 kHz bandwidth. The modulator was designed in 0.6 µm CMOS technology and was sent to the foundry to prototype.

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A switched current sigma delta modulator using a low distortion feedfoward topology

Cited by 6 publications

References 14 publications

High-order low-distortion switched-current cascade 2–2–2 ΣΔ modulator

High-order low-distortion switched-current cascade 2–2–2 ΣΔ modulator

A switched-current third-order oversampling modulator with coupled differential replica FMC

14-bit DR, 20 kHz BW, 2-2 MASH SI-Σ㪔 modulator using low-distortion feedforward topology

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A switched current sigma delta modulator using a low distortion feedfoward topology

Cited by 6 publications

References 14 publications

High-order low-distortion switched-current cascade 2&#x2013;2&#x2013;2 &#x03A3;&#x0394; modulator

High-order low-distortion switched-current cascade 2&#x2013;2&#x2013;2 &#x03A3;&#x0394; modulator

A switched-current third-order oversampling modulator with coupled differential replica FMC

14-bit DR, 20 kHz BW, 2-2 MASH SI-&#x03A3;&#x03A94; modulator using low-distortion feedforward topology

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High-order low-distortion switched-current cascade 2–2–2 ΣΔ modulator

High-order low-distortion switched-current cascade 2–2–2 ΣΔ modulator

14-bit DR, 20 kHz BW, 2-2 MASH SI-Σ㪔 modulator using low-distortion feedforward topology