A temperature compensated overcurrent and short-circuit detection method for SiC MOSFET modules

This article presents a numerical method in combination with a device simulation model used to analyse the parallel connection of several silicon carbide (SiC) metal oxide semiconductor field effect transistor (MOSFET) dies. Parallel connection is necessary to achieve the desired current carrying capability of the main inverters for xEV-drives. With this method, the effect of asymmetries within the chips' parameters, especially the gate threshold voltage, is investigated. The investigation results quantify to what extent the positive temperature coefficient of the on-state resistance can mitigate the overheating of one chip caused by switching loss imbalance. The results are used to define the necessary derating of the inverter output power so that no single chip is thermally overstressed.

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“…The resistance of the drift layer

R^{epi}

exhibits a positive temperature coefficient due to the increasing lattice vibrations. The higher the channel mobility, the higher the share of

R^{epi}

in the total resistance [28]. Therefore, it can be assumed that for future chip generations, the

R_{on} false(T_{normalJ} false)

dependence will become more pronounced.…”

Section: Simulation Results and Derating Calculationmentioning

confidence: 99%

Modelling parallel SiC MOSFETs: thermal self‐stabilisation vs. switching imbalances

Bertelshofer

März

Bakran

2019

IET Power Electronics

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“…Four different kinds of detection method are considered here, and they are resistor detection, transformer detection, Hall current detection, and desaturation detection [29]. Since the considerable power losses are consumed by the resistor when the current flows through it, the resistor detection is not suitable to measure the high current condition.…”

Section: Current Detectionmentioning

confidence: 99%

A Digital-Controlled SiC-Based Solid State Circuit Breaker with Soft Switch-Off Method for DC Power System

Qin

Xun

et al. 2019

Electronics

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Due to the lower on-state resistance, direct current (DC) solid state circuit breakers (SSCBs) based on silicon-carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) can reduce on-state losses and the investment of the cooling system when compared to breakers based on silicon (Si) MOSFETs. However, SiC MOSFETs, with smaller die area and higher current density, lead to weaker short-circuit ability, shorter short-circuit withstand time and higher protection requirements. To improve the reliability and short-circuit capability of SiC-based DC solid state circuit breakers, the short-circuit fault mechanisms of Si MOSFETs and SiC MOSFETs are revealed. Combined with the desaturation detection (DESAT), a “soft turn-off” short-circuit protection method based on source parasitic inductor is proposed. When the DESAT protection is activated, the “soft turn-off” method can protect the MOSFET against short-circuit and overcurrent. The proposed SSCB, combined with the flexibility of the DSP, has the μs-scale ultrafast response time to overcurrent detection. Finally, the effectiveness of the proposed method is validated by the experimental platform. The method can reduce the voltage stress of the power device, and it can also suppress the short-circuit current.

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“…In [28], a resistor connecting the blanking capacitor and the gate of SiC MOSFET is added to accelerate the charging of the blanking capacitor to reduce the blanking time. In [29], the separated detection paths for HSF and FUL are used to shorten the detection delay of FUL. However, all these DESAT methods encounter the problem of the fixed blanking time, which can not be adjusted dynamically during the switching periods once the system is powered up.…”

Section: Introductionmentioning

confidence: 99%

A short circuit protection circuit for SiC MOSFET with self-adjustive blanking time

Liu

Quan

Zhou

et al. 2021

IEICE Electron. Express

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This paper proposed a desaturation (DESAT) short circuit (SC) protection circuit for SiC MOSFET, where a blanking time setting module and an SC detection module are designed. The fall time of the drain-source voltage (VDS) for each switching period of SiC MOSFET is recorded and set as the blanking time for the hard switching fault (HSF) detection in the next switching period. Consequently, the detection delay for HSF is self-adjustive and can respond quickly to the operating state of SiC MOSFET. FPGA and discrete components are used to implement the proposed circuit. The function of the proposed circuit is verified using the double pulse test. The experiment results show that the blanking time automatically increases with the increase of load current. The default detection delay of the proposed protection circuit is set 240ns for HSF and can be adjusted during the subsequent switching period. So in the test under a 400V bus voltage, the detection delay is 240ns for HSF at the first switching period. And for HSF occurs at the second switching period, the detection delay is 200ns adjusted according to the operating state of the first switching period. Meanwhile, the detection delay for fault under load (FUL) is 72 ns.

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A temperature compensated overcurrent and short-circuit detection method for SiC MOSFET modules

Cited by 13 publications

References 3 publications

Modelling parallel SiC MOSFETs: thermal self‐stabilisation vs. switching imbalances

Modelling parallel SiC MOSFETs: thermal self‐stabilisation vs. switching imbalances

A Digital-Controlled SiC-Based Solid State Circuit Breaker with Soft Switch-Off Method for DC Power System

A short circuit protection circuit for SiC MOSFET with self-adjustive blanking time

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