A trace-based scenario database for high-level simulation of multimedia MP-SoCs

Stralen, Peter van; Pimentel, Andy D.

doi:10.1109/icsamos.2010.5642097

Cited by 14 publications

(6 citation statements)

References 15 publications

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“…In contrast to our approach, the gained results would only represent imprecise and averaged behaviors. In [18] application scenarios are detected by recurring event traces. Due to high-level simulation, the results depend on the used input data, whereas our static approach extracts all program modes.…”

Section: Related Workmentioning

confidence: 99%

Static run-time mode extraction by state partitioning in synchronous process networks

Beyer

Glesner

2011

Proceedings of the 14th International Workshop on Software and Compilers for Embedded Systems

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Process Networks (PNs) are used for modeling streamingoriented applications with changing behavior, which must be mapped on a concurrent architecture to meet the performance and energy constraints of embedded devices. Finding an optimal mapping of Process Networks to the constrained architecture presumes that the behavior of the PN is statically known. In this paper we present a static analysis for synchronous PNs that partitions the state space according to extract run-time modes based on a Data Augmented Control Flow Automaton (DACFA). The result is a mode automaton whose nodes describe identified program modes and whose edges represent transitions among them. Optimizing backends mapping from PNs to concurrent architectures can be guided by these analysis results.

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Section: Related Workmentioning

confidence: 99%

Static run-time mode extraction by state partitioning in synchronous process networks

Beyer

Glesner

2011

Proceedings of the 14th International Workshop on Software and Compilers for Embedded Systems

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“…For these models, the Kahn Process Network (KPN) model of computation is used [11], which models applications as a network of concurrent processes communicating via FIFO channels (see also refer to the section "Overview of Basic Data Flow Models" in the chapter "SysteMoC: A Data-Flow Programming Language for Codesign"). Next to the KPN application models, a scenario database [29] explicitly stores all the possible multi-application workload behaviors in terms of application scenarios (i.e., intraand inter-application scenarios).…”

Section: Scenario-based Dse Frameworkmentioning

confidence: 99%

Scenario-Based Design Space Exploration

Pimentel

Stralen

2016

Handbook of Hardware/Software Codesign

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Modern embedded systems are becoming increasingly multifunctional, and, as a consequence, they more and more have to deal with dynamic application workloads. This dynamism manifests itself in the presence of multiple applications that can simultaneously execute and contend for resources in a single embedded system as well as the dynamic behavior within applications themselves. Such dynamic behavior in application workloads must be taken into account during the early system-level Design Space Exploration (DSE) of Multiprocessor Systemon-Chip (MPSoC)-based embedded systems. Scenario-based DSE utilizes the concept of application scenarios to search for optimal mappings of a multiapplication workload onto an MPSoC. To this end, scenario-based DSE uses a multi-objective genetic algorithm (GA) to identify the mapping with the best average quality for all the application scenarios in the workload. In order to keep the exploration of the scenario-based DSE efficient, fitness prediction is used to obtain the quality of a mapping. This fitness prediction implies that instead of using the entire set of all possible application scenarios, a small but representative subset of application scenarios is used to determine the fitness of mapping solutions. Since the representativeness of such a subset is dependent on the application mappings being explored, these representative subsets of application scenarios are dynamically obtained by means of coexploration of the scenario subset space. In this chapter, we provide an overview of scenario-based DSE and, in particular, present multiple techniques for fitness prediction using representative subsets of application scenarios: a stochastic, deterministic, and hybrid combination.

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“…Such an interapplication scenario actually bundles the description of all the individual intra-application scenarios for each of the Process Networks (an MP3 recorder and Video player in Figure 1). Subsequently, we use a scenario database to compactly store all possible workload scenarios, consisting of both intra-application and inter-application scenarios [6]. This scenario database allows for on-demand generation of application workloads, in the form of event traces, according to the stored scenarios for the purpose of scenario-based DSE using the Sesame framework.…”

Section: Scenario Based Mpsoc Simulationmentioning

confidence: 99%

Scenario-based design space exploration of MPSoCs

Stralen

Pimentel

2010

2010 IEEE International Conference on Computer Design

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Abstract-Early design space exploration (DSE) is a key ingredient in system-level design of MPSoC-based embedded systems. The state of the art in this field typically still explores systems under a single, fixed application workload. In reality, however, the applications are concurrently executing and contending for system resources in such systems. As a result, the intensity and nature of application demands can change dramatically over time. This paper therefore introduces the concept of workload scenarios in the DSE process, capturing dynamic behavior both within and between applications. More specifically, we present and evaluate a novel, scenario-based DSE approach based on a coevolutionary genetic algorithm.

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A trace-based scenario database for high-level simulation of multimedia MP-SoCs

Cited by 14 publications

References 15 publications

Static run-time mode extraction by state partitioning in synchronous process networks

Static run-time mode extraction by state partitioning in synchronous process networks

Scenario-Based Design Space Exploration

Scenario-based design space exploration of MPSoCs

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