A variable gain high linearity low power baseband filter for WLAN

Ranganathan, S.; Fiez, T.S.

doi:10.1109/iscas.2004.1328327

Cited by 8 publications

(2 citation statements)

References 13 publications

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“…Because of high linearity, excellent high frequency characters, adjustable cutoff frequency and the lower power consumption compared with Active-RC filter and no inherent noise compared with switched-capacitor, Gm-C filter was widely used in the RF system to reduce the noise requirement of follow-up modules by filtering out high frequency signals and executing ant-mixing [1][2] [3] .…”

Section: Introductionmentioning

confidence: 99%

A Low-Power High Linearity Gm-C Filter

Sun

Zhang

et al. 2011

AMM

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A low-power, high linearity Gm-C filter is presented and designed.The input transistors of Gm is biased in linear region, and drain-source voltage is constant through feedback loop. The filter is designed in SMIC 0.18μm Mixed Signal CMOS PDK (Process Design Kit) with cutoff frequency 15.74 MHz, Passband ripple less than 0.2dB,while dissipating 2.5mW. It can be used as Baseband filter in RF system.

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Section: Introductionmentioning

confidence: 99%

A Low-Power High Linearity Gm-C Filter

Sun

Zhang

et al. 2011

AMM

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“…Hard-disk-drive (HDD) read/write channels [1,2] and virtually all wireless communication systems [3,4,5] are paradigmatic examples where amplitude equalization is an essential part of the linear signal processing. Fig.…”

Section: Introductionmentioning

confidence: 99%

Low-voltage Low-power CMOS IF Programmable Gain Amplifier

Calvo

Celma

Sanz

2006

2006 49th IEEE International Midwest Symposium on Circuits and Systems

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This paper presents a low-voltage low-power differential programmable gain amplifier (PGA) for wideband applications. To achieve low-voltage low-power and wideband operation while preserving linearity, the proposed cell is based on a gm-boosted source-degenerated differential pair. Programmability is achieved combining two techniques, a switchable array of source degenerating hybrid polysilicon-MOS resistors and a programmable output current mirror.Designed in a 0.35 gm CMOS technology, the proposed PGA is very compact in terms of silicon area and consumes 0.5 mW from a single 1.8 V supply. The programmable gain varies linearly in-dB from 0 to 21 dB in 3 dB steps through a 4-bit word. Simulation results show an almost constant bandwidth of 100 MHz and total harmonic distortion figures are below -70 dB over the whole gain range at 10 MHz for a 0.2 Vp-p differential output.

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