Adaptive mode-coupled harmonically tuned ultra low phase noise VCSO circuits

Poddar, Ajay K.; Rohde, Ulrich L.

doi:10.1109/fcs.2011.5977780

Cited by 4 publications

(1 citation statement)

References 28 publications

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“…Fig. 4 shows the plot SSA # adjusted using techniques reported in [8], overcomes the uncertainty of the noise measurement within reasonable degree of accuracy. Fig.…”

Section: Vco Measurementmentioning

confidence: 97%

Harmonics induced uncertainty in phase noise measurements

Calbaza

Gupta

Rohde

et al. 2012

2012 IEEE/MTT-S International Microwave Symposium Digest

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RF signals in VCOs, PLLs and synthesizers are characterized by signal power, harmonic content and phase noise. These parameters have to be accurately measured in order to guarantee the system performance. This paper focuses on the relationship between the signal's harmonic content and the precision of the phase noise measurement in test equipment. The phase noise measurement's accuracy is degraded when the measured signal has high harmonics. We demonstrate a case in which a 3 rd harmonic level of -7dBc results in a 12dB variation in the phase noise measurement's accuracy. Based on our studies, the phase noise test setup should include filters between the source and the test equipment to bring down the harmonic level to -20 dBc max.

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“…Fig. 4 shows the plot SSA # adjusted using techniques reported in [8], overcomes the uncertainty of the noise measurement within reasonable degree of accuracy. Fig.…”

Section: Vco Measurementmentioning

confidence: 97%

Harmonics induced uncertainty in phase noise measurements

Calbaza

Gupta

Rohde

et al. 2012

2012 IEEE/MTT-S International Microwave Symposium Digest

Self Cite

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Front-end receiver: Recent and emerging trend

Rohde

Poddar

Rubiola

et al. 2015

2015 Joint Conference of the IEEE International Frequency Control Symposium &Amp; The European Frequency and Time Forum

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Design and analysis of a K-band low-phase-noise phase-locked loop with subharmonically injection-locked technique

Yeh

Chang

2014

IEEE Trans. Ultrason., Ferroelect., Freq. Contr.

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In this paper, we present design and analysis of a K-band (18 to 26.5 GHz) low-phase-noise phase-locked loop (PLL) with the subharmonically injection-locked (SIL) technique. The phase noise of the PLL with subharmonic injection is investigated, and a modified phase noise model of the PLL with SIL technique is proposed. The theoretical calculations agree with the experimental results. Moreover, the phase noise of the PLL can be improved with the subharmonic injection. To achieve K-band operation with low dc power consumption, a divide-by-3 injection-locked frequency divider (ILFD) is used as a frequency prescaler. The measured phase noise of the PLL without injection is -110 dBc/Hz at 1 MHz offset at the operation frequency of 23.08 GHz. With the subharmonic injection, the measured phase noises at 1 MHz offset are -127, -127, and -119 dBc/Hz for the subharmonic injection number NINJ = 2, 3, and 4, respectively. Moreover, the performance of the proposed PLL with and without SIL technique can be compared with the reported advanced CMOS PLLs.

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Adaptive mode-coupled harmonically tuned ultra low phase noise VCSO circuits

Cited by 4 publications

References 28 publications

Harmonics induced uncertainty in phase noise measurements

Harmonics induced uncertainty in phase noise measurements

Front-end receiver: Recent and emerging trend

Design and analysis of a K-band low-phase-noise phase-locked loop with subharmonically injection-locked technique

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