ALTIROC1, a 20 ps time-resolution ASIC prototype for the ATLAS High Granularity Timing Detector (HGTD)

Performance of ALTIROC2 readout ASIC with LGADs for ATLAS HGTD picosecond MIP timing detector

“…The first 8 columns are equipped with voltage preamplifiers (VPA) and the last 7 columns with transimpedance preamplifiers (TZ). The ASIC provides Time-Of-Arrival (TOA) data with a bin size of 20 ps, on a range of 2.5 ns (encoded on 7 bits) and Time-Over-Threshold (TOT) data with a bin size of 160 ps, on a range of 20 ns (encoded on 8 bits) [1]. TOT measurements are used to perform time walk correction offline.…”

Electronics for Fast Timing

“…The chip is being fabricated with TSMC's 65nm technology using design principles consistent with radiation hardening and targets the following features: picosecond-level timing resolution; 10 Gs/s waveform digitization rate to allow pulse shape discrimination; moderate data buffering (256 samples/chnl); autonomous chip triggering, readout control, calibration and storage virtualization; on-chip feature extraction and multi-channel data fusion; reduced cost and increased reliability due to embedded controller (reduction of external logic). Existing readout approaches, such as ALTIROC [34] and the newer TimeSPOT1 [35], promise good-to-excellent timing resolution and channel density, and use a TDC-based measurement for signal arrival times and time-over-threshold (ToT) for an indirect estimate of integrated charge. However, these readout strategies will likely adversely impact the ability to provide sub-pixel spatial resolution and typically have difficulty compensating for environmental factors such as pile-up, sensor aging, and radiation; timing precision can also be adversely impacted by factors such as timewalk, baseline wander and waveform shape variations.…”

ALTIROC1, a 25 pico-second time resolution ASIC for the ATLAS High Granularity Timing Detector (HGTD)

“…Two Time-to-Digital converters (TDC) perform the digitization of the TOA and TOT information provided by the discriminator output. Details can be found in [2]. The TOA TDC provides a 7-bit digitization on a 2.5 ns range with a 20 ps bin.…”

“…A circular SRAM is integrated to store the 16 bits of the time measurement as well as the hit bit until a L0/L1 trigger [2]. To save power, data are stored only in case a hit occurs.…”

“…A first prototype, Altiroc0, with 4 channels was designed and tested in 2017 and 2018 [1] in order to evaluate the very font-end performance (preamplifier and discriminator). Then, in 2018, Altiroc1 was designed with 5 x 5 complete channels to read out 5 x 5 sensor matrix of 1.3 x 1.3 mm 2 LGAD sensors. These ASIC were tested on testbench, under TID irradiation and recently in testbeam conditions.…”