An 8-bit, 2 gigasample per second analog to digital converter

Nary, K.R.; Nubling, R.B.; Beccue, S.; Colleran, W.T.; Penney, J.; Wang, Keh-Chung

doi:10.1109/gaas.1995.529016

Cited by 23 publications

(4 citation statements)

References 2 publications

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“…In order to overcome these problems, variations on the flash architecture have been developed which use relatively few comparators yet retain good speed. Examples capable of Gs/s rates are the folded-flash [12]- [14]; and pipelined [15], [16] architectures.…”

Section: High-performance Adc Architecturesmentioning

confidence: 99%

Analog-to-digital converter survey and analysis

Walden

1999

IEEE J. Select. Areas Commun.

1,837

959

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Abstract-Analog-to-digital converters (ADC's) are ubiquitous, critical components of software radio and other signal processing systems. This paper surveys the state-of-the-art of ADC's, including experimental converters and commercially available parts. The distribution of resolution versus sampling rate provides insight into ADC performance limitations. At sampling rates below 2 million samples per second (Ms/s), resolution appears to be limited by thermal noise. At sampling rates ranging from 2 Ms/s to 4 giga samples per second (Gs/s), resolution falls off by 1 bit for every doubling of the sampling rate. This behavior may be attributed to uncertainty in the sampling instant due to aperture jitter. For ADC's operating at multi-Gs/s rates, the speed of the device technology is also a limiting factor due to comparator ambiguity. Many ADC architectures and integrated circuit technologies have been proposed and implemented to push back these limits. The recent trend toward single-chip ADC's brings lower power dissipation. However, technological progress as measured by the product of the ADC resolution (bits) times the sampling rate is slow. Average improvement is only 1.5 bits for any given sampling frequency over the last six-eight years.Index Terms-Analog-to-digital converters, aperture jitter, comparator ambiguity, input-referred noise, signal-to-noise ratio, spurious-free dynamic range.

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Section: High-performance Adc Architecturesmentioning

confidence: 99%

Analog-to-digital converter survey and analysis

Walden

1999

IEEE J. Select. Areas Commun.

1,837

959

View full text Add to dashboard Cite

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“…Conventional electronic analog-digital converters (ADC's) work well up to sampling rates of few 100's of mega-samples-per-second (MSPS) with resolutions of 8 bits and higher. However, electronic ADC's that can operate above single giga-samples-per-second (GSPS) sampling rates have very high-power consumption and provide very limited resolution [1]. The ever growing demand for higher bandwidth in both military and civilian applications has pushed the analog signals into the tens of gigahertz frequency range.…”

Section: Introductionmentioning

confidence: 99%

Highly parallel pulsed optoelectronic analog-digital converter

Kang

Frankel²,

Esman³

1998

IEEE Photon. Technol. Lett.

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We characterize the performance of a highly parallel pulsed optoelectronic analog to digital converter. The system is based on a time-domain to wavelength-domain mapping, such that an input analog signal is parallelized using a wavelengthdivision-demultiplexed scheme. Each parallel wavelength channel is then digitized using conventional, slow electronic analog-digital converters. We use narrow-band signals up to 18 GHz and histogram testing to characterize the system. From the measurements, we deduce the effective number of bits of the system to be 6 and 5 bits for 4 and 36 giga-samples-per-second (GSPS) sampling rates, respectively.Index Terms-Analog-digital conversion, optical data processing, wavelgnth-division multiplexing.

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“…This figure clearly illustrates the need for novel concepts leading to revolutionary improvements in the development of ADCs. Superconducting ADCs can operate at high sampling speeds but their wide spread implementation is limited by their stringent cooling requirements [2]. The high bandwidth, reduced weight, and reduced power requirements makes photonics an attractive technology for wide-band signal conversion.…”

Section: Introductionmentioning

confidence: 99%

<title>Recent advancements in photonic converters</title>

et al. 2000

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Analog-to-digital converters (ADCs) are an essential component of digital receiver systems. Progress at advancing the electronic ADC modules has been very slow due in large part to the difficulties in fabricating the electronic circuitry required for very high resolution and high sampling rate converters. This slow progress has resulted in a bottleneck between the received analog signal and the digital signal processing system. Single or multiple analog signal down conversion stages are required in digital receivers to down convert the received analog signal to an intermediate frequency (IF) that can be processed by the electronic ADC.There has been much recent interest in the use of photonics for direct digitization of the analog signal at the received RF frequency thus eliminating the need for analog down conversion. This paper reviews some of the recent research advancements in photonic ADCs. We will especially focus on the development of a novel photonic ADC module that uses semiconductor saturable absorbers to perform the data quantization. We will also present recent results in the development of a mode-locked fiber laser used as the sampling source in this photonic ADC architecture.

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An 8-bit, 2 gigasample per second analog to digital converter

Cited by 23 publications

References 2 publications

Analog-to-digital converter survey and analysis

Analog-to-digital converter survey and analysis

Highly parallel pulsed optoelectronic analog-digital converter

<title>Recent advancements in photonic converters</title>

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