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An optically clocked track-and-hold (TH) circuit for improved TH linearity and noise performance is presented. Results with fi.=1.0073 GHz and sample rate f,=1.003 GWs show 11.8 SFDR bits and 9.6 SNR bits.

We report on an 8-bit, 2 gigasample per second analog to digital converter (ADC) fabricated in an AlGaAslGaAs heterojunction bipolar transistor (HBT) process. The ADC utilizes a folding and interpolation architecture to provide wide bandwidth with a moderate device count. When sampling at 2 gigasamples per second (GS/s), the ADC has demonstrated an effective resolution of between 6.5 and 7.0 effective bits for analog inputs between DC and 1.5 GHz and a single tone spurious free dynamic range of 48 dB at Nyquist. The ADC incorporates over 2500 transistors and dissipates 5.3 Watts from 5.0 V and -5.2 V supplies.

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