An automated design methodology for stress avoidance in analog & mixed signal designs

Implications of Small Geometry Effects on <inline-formula> <tex-math notation="LaTeX">$g_m/I_D$ </tex-math> </inline-formula> Based Design Methodology for Analog Circuits

“…Sameer et al [9] introduced an automated post circuit design strategy that minimizes STI induced stress while Zhang et al [10] developed a circuit synthesis technique which uses geometric programming to minimize the effects of STI induced stress, the well proximity effect and RSCE. H. C. Ou et al [11] presented a sophisticated analog layout placement technique that accounts for layout dependent effects.…”

“…g m /I D design approach remains valid. Small geometry effects can be minimized without using sophisticated sizing algorithms discussed in [9]- [10]. The "unit-sized" transistors do not account for the well proximity effect and the oxide-to-oxide spacing effect; these effects can be minimized during layout using best layout practice techniques described in [5] and [13].…”