An efficient mechanism for performance optimization of variable-latency designs

Masking timing errors on speed-paths in logic circuits

“…Comparing the over-approximated SPCF, computed using the node-based algorithm presented in [28], to the exact SPCF indicates that the node-based approach presented in [28] may lead to large over-approximations of the SPCF for most circuits [22]. Hence, an extension of the node-based approach to reduce the over-approximation in the SPCF was presented in [22].…”

“…The extended node-based approach of [22] uses arrival and required time information to mark gates with a negative slack as critical. Using two functions, the long path activation function and the short path activation function, both statically and dynamically sensitizable patterns are computed in a single topological pass through the circuit.…”

“…Our work extends the node-based algorithm from [22] to a pathbased algorithm that computes the SPCF exactly. In our path-based approach, gates are not marked as critical based on required and arrival time information.…”

“…However, the accuracy of the path-based algorithm comes at the cost of computational complexity. The trade-off between accuracy and runtime for the node-based approach of [22] and the proposed path-based approach is illustrated in Table 1. The first 3 columns report the name, number of inputs and outputs, and area of the circuit.…”

“…The SPCF is computed as the set of all patterns that sensitize speedpaths within 10% of the critical path delay. The number of critical patterns, i.e., the number of input patterns in the SPCF and the runtime for computing the set of critical patterns for the node-based approach [22] and the path-based extension are shown in columns 4 and 5. Note that the set of critical patterns computed using the node-based approach is always a super-set of the set of critical patterns computed using the proposed path-based approach.…”