An Energy-Efficient Current-Controlled Write and Read Scheme for Resistive RAMs (RRAMs)

Abstract

Energy efficiency remains one of the main factors for improving the key performance markers of RRAMs to support IoT edge devices. This paper proposes a simple and feasible low power design scheme which can be used as a powerful tool for energy reduction in RRAM circuits. The design scheme is exclusively based on current control during write and read operations and ensures that write operations are completed without wasted energy. Self-adaptive write termination circuits are proposed to control the RRAM current during FORMING, RESET and SET operations. The termination circuits sense the programming current and stop the write pulse as soon as a preferred programming current is reached. Simulation results demonstrate that an appropriate choice of the programming currents can help obtain 4.1X improvement in FORMING, 9.1X improvement in SET and 1.12X improvement in RESET energy. Also, the possibility to have a tight control over the RESET resistance is demonstrated. READ energy optimization is also covered by leveraging on a differential sense amplifier offering a programmable current reference. Finally, an optimal trade-off between energy consumption during SET/RESET operations and an acceptable read margin is established according to the final application requirements. INDEX TERMSResistive RAM (ReRAM), RRAM, OxRAM, energy optimization, write termination, programming current, read current.

LightPC

“…Note that there are also several studies expecting to increase the write endurance by 10 12 ∼10 13 , which is similar to or slightly worse than that of DRAM (e.g., 10 14 ∼10 16 [17,57,85]). For example, [86] uses a thin metallic linear and confined pore cell structure to reduce the unavailability of set/reset switching thereby significantly increasing the endurance on writes.…”

STATE: A Test Structure for Rapid Prediction of Resistive RAM Electrical Parameter Variability

“…Variability also affects the switching time. For this aspect, it has been demonstrated that switching time variability can severely degrade speed and energy consumption [16].…”

Multi-Level Control of Resistive RAM (RRAM) Using a Write Termination to Achieve 4 Bits/Cell in High Resistance State

“…Adopting this standard pulse would lead to a final HRS resistance value close to 382 MΩ. Note that the standard RST pulse width is set to 3.5 µs to cover the worst cases during RST (i.e., tail bits in the switching parameter distributions [26,27]).…”