An FPGA-based Hardware Acceleration For Key Steps of Facet Imaging Algorithm

Nan, Tianhao; Zhu, Yongxin; Li, Wanyi; Chen, Xintong; Song, Yibing; Hou, Junjie

doi:10.1109/smartcloud.2019.00025

Cited by 2 publications

(3 citation statements)

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“…This paper is an extension of Reference [ 9 ]. Compared to previous work, we include a new hardware architecture for the phase rotation implementation on the FPGA and take the data transmission between the host and extended hardware into consideration in Section 5.4 .…”

Section: Introductionmentioning

confidence: 91%

“…To the best of our knowledge, there are no studies of FPGA-based phase rotation combined with gridding of facet accelerators for FoV imaging, except for our previous work [9] on the FPGA-based accelerator with adequate performance for the imaging application. Besides, the related work of the imaging accelerators concerns the computing delay of each transaction, and the issue on the large volume of data is not taken into consideration for astronomical imaging acceleration.…”

Section: Related Workmentioning

confidence: 99%

“…The comparison of the phase rotation acceleration effect among different methods is shown in Table 4 [9]. There are 95,865 sampled data processed in a phase rotation test.…”

Section: Evaluation Of Phase Rotation Optimizationmentioning

confidence: 99%

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Accelerating Faceting Wide-Field Imaging Algorithm with FPGA for SKA Radio Telescope as a Vast Sensor Array

Song

Zhu

Nan

et al. 2020

Sensors

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The SKA (Square Kilometer Array) radio telescope will become the most sensitive telescope by correlating a huge number of antenna nodes to form a vast array of sensors in a region over one hundred kilometers. Faceting, the wide-field imaging algorithm, is a novel approach towards solving image construction from sensing data where earth surface curves cannot be ignored. However, the traditional processor of cloud computing, even if the most sophisticated supercomputer is used, cannot meet the extremely high computation performance requirement. In this paper, we propose the design and implementation of high-efficiency FPGA (Field Programmable Gate Array) -based hardware acceleration of the key algorithm, faceting in SKA by focusing on phase rotation and gridding, which are the most time-consuming phases in the faceting algorithm. Through the analysis of algorithm behavior and bottleneck, we design and optimize the memory architecture and computing logic of the FPGA-based accelerator. The simulation and tests on FPGA are done to confirm the acceleration result of our design and it is shown that the acceleration performance we achieved on phase rotation is 20× the result of the previous work. We then further designed and optimized an efficient microstructure of loop unrolling and pipeline for the gridding accelerator, and the designed system simulation was done to confirm the performance of our structure. The result shows that the acceleration ratio is 5.48 compared to the result tested on software in gridding parts. Hence, our approach enables efficient acceleration of the faceting algorithm on FPGAs with high performance to meet the computational constraints of SKA as a representative vast sensor array.

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Section: Introductionmentioning

confidence: 91%

Section: Related Workmentioning

confidence: 99%