An Output Capacitor-Less Low-Dropout Regulator with 0–100 mA Wide Load Current Range

Abstract

An output capacitor-less low-dropout (OCL-LDO) regulator with a wide range of load currents is proposed in this study. The structure of the proposed regulator is based on the flipped-voltage-follower LDO regulator. The feedback loop of the proposed regulator consists of two stages. The second stage is turned on or off depending on the variation in the output load current. Hence, the regulator can retain a phase margin at a wide range of load currents. The proposed regulator exhibits a better regulation performance compared to the ones in previous studies. The test chip is fabricated using a 65-nm CMOS process.

BAAL: Bayesian Automated Low Voltage Drop Regulator Design

“…LDO's are used in SoC's in order to provide stable and robust power for various circuits unaffected by input and output variations. In Park et al (2019), authors design a multistage LDO with spike detection circuits. It switches from 5-stage to 3-stage modes affected by the load current.…”

“…The spike detection circuit used in Park et al (2019) is first introduced in Or and Leung (2010) whereas discussed two complementary capacitors or used to detect the spikes at the output and consequently this changes the voltage levels at the gates of the current mirrors. In Keikhosravy and Mirabbasi (2014), a bulk-modulation technique is introduced to improve accuracy and stability for low-power applications.…”

An Analysis of Non-Isolated DC-DC Converter Topologies with Energy Transfer Media

“…Thus, the efficiency of the BKETM is higher than that of the CBK when M BK is high. However, as M BK approaches 1, the C-path current, I C,Φ2 , rapidly increases according to Equation (5). Then, the total conduction loss increases again, resulting in the degradation of the efficiency of the BKETM.…”

“…PMICs consist of a linear regulator, a switched capacitor (SC) converter, and a switched inductor (SI) converter [3,4]. Although linear regulators offer the advantage of low output voltage ripple, they have low power efficiency [5][6][7][8]. In contrast, SC converters have high power density with better power efficiency than linear regulators, but they suffer from severe degradation of efficiency when the conversion ratio of the SC converter differs from a pre-defined value [9][10][11][12].…”

Capacitor‐less FVF low drop‐out regulator with active feed‐forward compensation and efficient slew‐rate enhancer circuit

“…The flipped voltage follower (FVF) based capacitor‐less low drop‐out regulators (LDOs) are attractive due to their simplicity, fast transient responses and stability [1–6]. These LDOs have multi‐stage amplifiers with negative feedback to regulate the desired output voltage [7–9].…”