Analog circuit testing based on sensitivity computation and new circuit modeling

Hamida, N.B.; Kaminska, Bożena

doi:10.1109/test.1993.470638

Cited by 65 publications

(39 citation statements)

References 14 publications

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“…The determination of the parameters TR ri , OV ri , ST ri , TD ri , according to (4), and S i , according to (5), is automatically performed using post-processing in the graphical analyzer Probe. The macro-definitions TRr, OVr, STr and TDr are created and used for this purpose.…”

Section: (St) V(ov) V(tr) and V(td)mentioning

confidence: 99%

A Model- Based Approach to Automatic Diagnosis Using General Purpose Circuit Simulators

Dimitrova

Gadjeva

Bossche

et al. 2006

2006 IEEE International Symposium on Industrial Electronics

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An approach is proposed to automatic testing of analog electronic circuits using PSpice-like general purpose circuit simulators based on parameterized models of the faulty elements. Using time domain response parameters that well characterize the faults, the set of typical faulty variants of the circuit is simulated. Using post-processing of the obtained results and macro-definitions in the graphical analyzer Probe, a diagnosis of parametric faults in the circuit is performed. The models of the faulty elements are defined in the form of parameterized library components for the Cadence PSpice simulator. Examples are given illustrating the proposed approach.

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Section: (St) V(ov) V(tr) and V(td)mentioning

confidence: 99%

A Model- Based Approach to Automatic Diagnosis Using General Purpose Circuit Simulators

Dimitrova

Gadjeva

Bossche

et al. 2006

2006 IEEE International Symposium on Industrial Electronics

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“…2) Steady State Frequency Domain Testing: In the frequency domain testing, a sinusoidal signal of a certain frequency is applied to the CUT and the steady state response of the CUT is monitored for fault detection [16]- [24]. Although steady state ac tests can detect parametric faults effectively, applying many sinusoidal signals and studying the steady state response of the CUTs is time consuming.…”

Section: ) Static DC Testingmentioning

confidence: 99%

“…Assuming there are test criteria on the alternate test measurements , they can be represented as in (15), where are certain specified bounds or (15) Each of the test criterion defines a region in the measurement space defined by (16).The region in the measurement space that satisfies all the test criteria is defined by (17) (16) (17) In [1] and [31]- [34], a hyperplane was derived for each of the single-ended specifications ( ) as the test criterion. Four such hyperplanes are shown in Fig.…”

Section: Multivariate Parametric Fault Modelingmentioning

confidence: 99%

Prediction of analog performance parameters using fast transient testing

Variyam

Cherubal²,

Chatterjee

2002

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

230

116

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Abstract-In this paper, a fast transient testing methodology for predicting the performance parameters of analog circuits is presented. A transient test signal is applied to the circuit under (cut) test and the transient response of the circuit is sampled and analyzed to predict the circuit's performance parameters. An algorithm for generating the optimum transient test signal is presented. The methodology is demonstrated in a production environment using a low-power opamp. Result from production test data showed: 1) a ten times speedup in production testing; 2) accurate prediction of the performance parameters; and (3) a simpler test configuration.

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“…The element testing technique will be used for analog circuits [8]. For the digital circuit an automatic test vector generation technique based on BDD and boolean difference will be used as described in [10].…”

Section: Analog-digital Circuit Testingmentioning

confidence: 99%