Analog Complementary Metal–Oxide–Semiconductor Integrate-and-Fire Neuron Circuit for Overflow Retaining in Hardware Spiking Neural Networks

Abstract

The spiking neural network (SNN) is regarded as the third generation of an artificial neural network (ANN). In order to realize a high-performance SNN, an integrate-and-fire (I&F) neuron, one of the key elements in an SNN, must retain the overflow in its membrane after firing. This paper presents an analog CMOS I&F neuron circuit for overflow retaining. Compared with the conventional I&F neuron circuit, the basic operation of the proposed circuit is confirmed in a circuit-level simulation. Furthermore, a single-layer SNN simulation was also performed to demonstrate the effect of the proposed circuit on neural network applications by comparing the raster plots from the circuit-level simulation with those from a high-level simulation. These results demonstrate the potential of the I&F neuron circuit with overflow retaining characteristics to be utilized in upcoming high-performance hardware SNN systems.

Insertion of Ag Layer in TiN/SiNx/TiN RRAM and Its Effect on Filament Formation Modeled by Monte Carlo Simulation

“…However, these higher operating voltages and LRS/HRS resistances are actually rather desirable from the perspective of neuromorphic systems. Spiking neural networks, a leading learning approach in neuromorphic systems, are introducing integrate & fire circuits to mimic biological neurons [49]. The value of the spiking voltage is determined by the threshold voltage of the MOSFETs in the inverter and this value is at least 1V [49].…”

“…Spiking neural networks, a leading learning approach in neuromorphic systems, are introducing integrate & fire circuits to mimic biological neurons [49]. The value of the spiking voltage is determined by the threshold voltage of the MOSFETs in the inverter and this value is at least 1V [49]. Therefore, any RRAMs with an operating voltage lower than 1V are not suitable for use as synapses in such systems because they are susceptible to their synaptic weights being changed even during the inference step.…”

Integrate-and-Fire Neuron Circuit With Synaptic Off-Current Blocking Operation

“…Fig. 1 shows a conventional CMOS I & F neuron circuit based on the circuit proposed in our previous study [21]. The circuit consists of an integration part and a spike generation part to perform the I & F functions.…”

Memory Devices for Flexible and Neuromorphic Device Applications

“…[29,31,32,44,[52][53][54][55] In addition, neuromorphic computing has emerged as an application of memory devices beyond conventional computing technology. [39,[56][57][58] Neuromorphic computing emulates highly complex computation processes of the brain such as synaptic plasticity, backpropagation learning, and nonlinear synaptic weight update. [59] The synaptic plasticity indicates the variation in synaptic weights as a function of synaptic activity.…”

“…[63,64] Recently, complementary metal-oxide-semiconductor (CMOS)based neuromorphic systems have been launched in the market for artificial intelligence (AI) computing; however, they still have limitations because they are constructed with conventional CMOS hardware. [26,58,65] Diverse functional materials have been used in the fabrication of artificial synapses, which are the fundamental building blocks of neural networks. [66][67][68][69][70][71] The critical parameters for neuromorphic computation are the number of memory states, energy consumption, and the operation endurance characteristics.…”