Analog/RF performance of L- and U-shaped channel tunneling field-effect transistors and their application as digital inverters

Abstract

The inverter performance comparisons of L- and U-shaped channel tunneling field-effect transistors (LTFET and UTFET) are investigated by using Sentaurus TCAD tool. The RF figures of merit for these two TFETs are analyzed in terms of transconductance (gm), output conductance (gds), gate capacitance (Cgg), gate-to-source capacitance (Cgs), gate-to-drain capacitance (Cgd), unit-gain cut-off frequency (fT), the maximum frequency of oscillation (fMAX) and gain bandwidth product (GBW). The simulation results reveal that LTFET and UTFET have the similar DC characteristic due to the identical tunneling process. And the better RF performance LTFET provides due to it has the much smaller Cgd than UTFET. Meanwhile, this work uses mixed device-circuit simulations to predict the performance of inverter circuit implemented with LTFET and UTFET for the first time. And the calculated results demonstrate LTFET is more optimization for inverter circuit design in the novel generation transistors. And all the simulation results in this paper can be used as a reference to choose the characteristic parameters of novel TFETs for inverter applications.

Source-All-Around Tunnel Field-Effect Transistor (SAA-TFET): Proposal and Design

“…In the following simulations, two cases for the terminal voltages are considered to study both low-and high-power supply, the first is when VDS = 0.5 V for the range 0 ≤ Regarding the analog behavior, the cutoff frequency is selected as a figure of merit (FOM) where it can be extracted using advanced two port network by the unit-gainpoint method which gives [38],…”

Microwave analysis of SiGe heterojunction double‐gate tunneling field‐effect transistor through its small‐signal equivalent circuit

“…The inverse tendency of C gd is revealed since C gd is larger than C gs in TFET. As the result, small capacitance is the crucial factor improving the TFET RF performances…”

Analysis of tunneling field‐effect transistor with germanium source junction using small‐signal equivalent circuit

“…The C gd consists of outer fringing capacitance C of , inner fringing capacitance at the drain side C dif , and gate‐inversion layer capacitance at the drain side, which is simply formulated as C gd = C of + C dif + C gd,inv . C gd is one of the key parameters affecting the switching speed and RF performances of TFETs and should be minized . C gd of Ge‐source TFET is smaller than that of Si‐source one over the entire V GS range of interest up to 1 V.…”