Analysis of Circuit Simulation Considering Total Ionizing Dose Effects on FinFET and Nanowire FET

Won, Hyeonjae; Kang, Myounggon

doi:10.3390/app11030894

Cited by 6 publications

(3 citation statements)

References 31 publications

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“…Therefore, studying the total dose effect of CMOS circuits based on inverters is important [ 15 ]. Currently, the latest modeling method for research on circuit level total dose effects is to calibrate Berkeley Short-Channel IGFET Model Level3 (BSIM3) model parameters based on Simulation Program with Integrated Circuit Emphasis (SPICE) software to replace irradiated device models and, based on this, simulate the impact of total dose effects on circuits at different irradiation doses [ 16 ]. Although the simulation speed of this method is fast, the accuracy of the BSIM3 simulation method needs to be improved, because it is only aimed at conventional silicon based MOS devices and cannot be accurately used for the simulation of nanoscale FDSOI devices.…”

Section: Influence Of Tid Effect On Inverter Circuitsmentioning

confidence: 99%

Simulation of Total Ionizing Dose Effects Technique for CMOS Inverter Circuit

et al. 2023

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The total ionizing dose (TID) effect significantly impacts the electrical parameters of fully depleted silicon on insulator (FDSOI) devices and even invalidates the on–off function of devices. At present, most of the irradiation research on the circuit level is focused on the single event effect, and there is very little research on the total ionizing dose effect. Therefore, this study mainly analyzes the influence of TID effects on a CMOS inverter circuit based on 22 nm FDSOI transistors. First, we constructed and calibrated an N-type FDSOI metal-oxide semiconductor (NMOS) structure and P-type FDSOI metal-oxide semiconductor (PMOS) structure. The transfer characteristics and trapped charge distribution of these devices were studied under different irradiation doses. Next, we studied the TID effect on an inverter circuit composed of these two MOS transistors. The simulation results show that when the radiation dose was 400 krad (Si), the logic threshold drift of the inverter was approximately 0.052 V. These results help further investigate the impact on integrated circuits in an irradiation environment.

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Section: Influence Of Tid Effect On Inverter Circuitsmentioning

confidence: 99%

Simulation of Total Ionizing Dose Effects Technique for CMOS Inverter Circuit

et al. 2023

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“…Therefore, studying the total dose effect of CMOS circuits based on inverters is important [15]. Currently, the latest modeling method for research on circuit level total dose effects is to calibrate BSIM3 model parameters based on HSPICE software to replace irradiated device models, and based on this, simulate the impact of total dose effects on circuits at different irradiation doses [16]. Although the simulation speed of this method is fast, the accuracy of the BSIM3 simulation method needs to be improved because it is only aimed at conventional silicon based MOS devices and cannot be accurately used for the simulation of nanoscale FDSOI devices.…”

Section: Influence Of Tid Effect On Inverter Circuitsmentioning

confidence: 99%

Simulation Of Total Ionizing Dose Effects Technique for CMOS Inverter Circuit

Gao¹,

Yin²,

Chen³

et al. 2023

Preprint

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The total ionizing dose (TID) effect significantly impacts the electrical parameters of fully depleted silicon on insulator (FDSOI) devices and even invalidates the on-off function of devices. At present, most of the irradiation research on the circuit level is focused on the single event effect, and the research on the total ionizing dose effect is very little. Therefore, this study mainly analyzes the influence of TID effects on a CMOS inverter circuit based on 22 nm FDSOI transistors. First, we constructed and calibrated an N-type FDSOI metal-oxide semiconductor (NMOS) structure and P-type FDSOI metal-oxide semiconductor (PMOS) structure. The transfer characteristics and trapped charge distribution of these devices were studied under different irradiation doses. Next, we studied the TID effect on an inverter circuit composed of these two MOS transistors. The simulation results show that when the radiation dose is 400 krad (Si), the logic threshold drift of the inverter is approximately 0.052 V. These results help further investigate the impact on integrated circuits in the irradiation environment.

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“…Figure 4 shows the shifted VT according to each total dose rate. It has been already known that the VT shifts of PMOS is larger than that of NMOS in planar MOSFET because the gate length is long, and there are many places where trapping can occur in the interface [16,17]. In contrast, the GAA structure has a much shorter channel length and supe-rior gate controllability, with less variation occurring because of TID effects.…”

Section: Nmos Ns-fet Nmos Nw-fetmentioning

confidence: 99%

TID Circuit Simulation in Nanowire FETs and Nanosheet FETs

Lee

Kang

2021

Electronics

Self Cite

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In this study, the effects of the total ionizing dose (TID) on a nanowire (NW) field-effect transistor (FET) and a nanosheet (NS) FET were analyzed. The devices have Gate-all-around (GAA) structure that are less affected by TID effects because GAA structures have better gate controllability than previously proposed structures, such as planar MOSFETs and FinFETs. However, even for GAA devices with the same channel cross-sectional area and equivalent oxide thickness, structural differences can exist, which can result in different tolerances of TID effects. To observe the device and circuit operation characteristics of these GAA devices with structural differences, n-type and p-type devices were designed and simulated. The circuit simulation according to TID effects was conducted using Berkeley short-channel insulated-gate FET model (BSIM) common multi-gate (CMG) parameters. The NS-FET generated more VT shift than the NW-FET because the NS-FET had a wider gate oxide area and channel circumference, resulting in more interface hole traps. The abnormal VT shift leads to causing unstable circuit operation and delays. Therefore, it was confirmed that the ability of the NW-FET to tolerate TID effects was better than that of the NS-FET.

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Analysis of Circuit Simulation Considering Total Ionizing Dose Effects on FinFET and Nanowire FET

Cited by 6 publications

References 31 publications

Simulation of Total Ionizing Dose Effects Technique for CMOS Inverter Circuit

Simulation of Total Ionizing Dose Effects Technique for CMOS Inverter Circuit

Simulation Of Total Ionizing Dose Effects Technique for CMOS Inverter Circuit

TID Circuit Simulation in Nanowire FETs and Nanosheet FETs

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